1 From 004eb24e939b5b31f828333f37fb5cb2a877d6f2 Mon Sep 17 00:00:00 2001
2 From: Kristian Evensen <kristian.evensen@gmail.com>
3 Date: Sun, 17 Jun 2018 14:41:47 +0200
4 Subject: [PATCH] arm: dts: Add Unielec U7623 DTS
7 arch/arm/boot/dts/Makefile | 1 +
8 .../dts/mt7623a-unielec-u7623-02-emmc-512M.dts | 18 +
9 .../boot/dts/mt7623a-unielec-u7623-02-emmc.dtsi | 366 +++++++++++++++++++++
10 3 files changed, 385 insertions(+)
11 create mode 100644 arch/arm/boot/dts/mt7623a-unielec-u7623-02-emmc-512M.dts
12 create mode 100644 arch/arm/boot/dts/mt7623a-unielec-u7623-02-emmc.dtsi
14 Index: linux-4.19.57/arch/arm/boot/dts/Makefile
15 ===================================================================
16 --- linux-4.19.57.orig/arch/arm/boot/dts/Makefile
17 +++ linux-4.19.57/arch/arm/boot/dts/Makefile
18 @@ -1193,6 +1193,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
19 mt7623a-rfb-nand.dtb \
20 mt7623n-rfb-emmc.dtb \
21 mt7623n-bananapi-bpi-r2.dtb \
22 + mt7623a-unielec-u7623-02-emmc-512M.dtb \
25 dtb-$(CONFIG_ARCH_ZX) += zx296702-ad1.dtb
26 Index: linux-4.19.57/arch/arm/boot/dts/mt7623a-unielec-u7623-02-emmc-512M.dts
27 ===================================================================
29 +++ linux-4.19.57/arch/arm/boot/dts/mt7623a-unielec-u7623-02-emmc-512M.dts
32 + * Copyright 2018 Kristian Evensen <kristian.evensen@gmail.com>
34 + * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
38 +#include "mt7623a-unielec-u7623-02-emmc.dtsi"
41 + model = "UniElec U7623-02 eMMC (512M RAM)";
42 + compatible = "unielec,u7623-02-emmc-512m", "unielec,u7623-02-emmc", "mediatek,mt7623";
45 + device_type = "memory";
46 + reg = <0 0x80000000 0 0x20000000>;
49 Index: linux-4.19.57/arch/arm/boot/dts/mt7623a-unielec-u7623-02-emmc.dtsi
50 ===================================================================
52 +++ linux-4.19.57/arch/arm/boot/dts/mt7623a-unielec-u7623-02-emmc.dtsi
55 + * Copyright 2018 Kristian Evensen <kristian.evensen@gmail.com>
57 + * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
60 +#include <dt-bindings/input/input.h>
61 +#include "mt7623.dtsi"
62 +#include "mt6323.dtsi"
65 + compatible = "unielec,u7623-02-emmc", "mediatek,mt7623";
72 + bootargs = "root=/dev/mmcblk0p2 rootfstype=squashfs,f2fs";
73 + stdout-path = "serial2:115200n8";
78 + proc-supply = <&mt6323_vproc_reg>;
82 + proc-supply = <&mt6323_vproc_reg>;
86 + proc-supply = <&mt6323_vproc_reg>;
90 + proc-supply = <&mt6323_vproc_reg>;
94 + reg_1p8v: regulator-1p8v {
95 + compatible = "regulator-fixed";
96 + regulator-name = "fixed-1.8V";
97 + regulator-min-microvolt = <1800000>;
98 + regulator-max-microvolt = <1800000>;
100 + regulator-always-on;
103 + reg_3p3v: regulator-3p3v {
104 + compatible = "regulator-fixed";
105 + regulator-name = "fixed-3.3V";
106 + regulator-min-microvolt = <3300000>;
107 + regulator-max-microvolt = <3300000>;
109 + regulator-always-on;
112 + reg_5v: regulator-5v {
113 + compatible = "regulator-fixed";
114 + regulator-name = "fixed-5V";
115 + regulator-min-microvolt = <5000000>;
116 + regulator-max-microvolt = <5000000>;
118 + regulator-always-on;
122 + compatible = "gpio-keys";
123 + pinctrl-names = "default";
124 + pinctrl-0 = <&key_pins_a>;
128 + linux,code = <KEY_RESTART>;
129 + gpios = <&pio 256 GPIO_ACTIVE_LOW>;
134 + compatible = "gpio-leds";
135 + pinctrl-names = "default";
136 + pinctrl-0 = <&led_pins_unielec>;
139 + label = "u7623-01:green:led3";
140 + gpios = <&pio 14 GPIO_ACTIVE_LOW>;
141 + default-state = "off";
145 + label = "u7623-01:green:led4";
146 + gpios = <&pio 15 GPIO_ACTIVE_LOW>;
147 + default-state = "off";
152 + compatible = "mediatek,mt7530";
153 + #address-cells = <1>;
166 + compatible = "mediatek,eth-mac";
168 + phy-mode = "trgmii";
178 + #address-cells = <1>;
180 + phy5: ethernet-phy@5 {
182 + phy-mode = "rgmii-rxid";
188 + compatible = "mediatek,mt7530";
189 + #address-cells = <1>;
192 + pinctrl-names = "default";
194 + resets = <ðsys 2>;
195 + reset-names = "mcm";
196 + core-supply = <&mt6323_vpa_reg>;
197 + io-supply = <&mt6323_vemc3v3_reg>;
199 + dsa,mii-bus = <&mdio>;
202 + #address-cells = <1>;
209 + cpu = <&cpu_port0>;
215 + cpu = <&cpu_port0>;
221 + cpu = <&cpu_port0>;
227 + cpu = <&cpu_port0>;
233 + cpu = <&cpu_port0>;
236 + cpu_port0: port@6 {
239 + ethernet = <&gmac0>;
240 + phy-mode = "trgmii";
251 + pinctrl-names = "default", "state_uhs";
252 + pinctrl-0 = <&mmc0_pins_default>;
253 + pinctrl-1 = <&mmc0_pins_uhs>;
256 + max-frequency = <50000000>;
258 + vmmc-supply = <®_3p3v>;
259 + vqmmc-supply = <®_1p8v>;
264 + key_pins_a: keys-alt {
266 + pinmux = <MT7623_PIN_256_GPIO256_FUNC_GPIO256>,
267 + <MT7623_PIN_257_GPIO257_FUNC_GPIO257>;
272 + led_pins_unielec: leds-unielec {
274 + pinmux = <MT7623_PIN_14_GPIO14_FUNC_GPIO14>,
275 + <MT7623_PIN_15_GPIO15_FUNC_GPIO15>;
279 + mmc0_pins_default: mmc0default {
281 + pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
282 + <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
283 + <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
284 + <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
285 + <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
286 + <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
287 + <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
288 + <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
289 + <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
295 + pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
300 + pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
305 + mmc0_pins_uhs: mmc0 {
307 + pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
308 + <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
309 + <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
310 + <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
311 + <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
312 + <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
313 + <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
314 + <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
315 + <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
317 + drive-strength = <MTK_DRIVE_2mA>;
318 + bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
322 + pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
323 + drive-strength = <MTK_DRIVE_2mA>;
324 + bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
328 + pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
333 + pwm_pins_a: pwm@0 {
335 + pinmux = <MT7623_PIN_203_PWM0_FUNC_PWM0>,
336 + <MT7623_PIN_204_PWM1_FUNC_PWM1>,
337 + <MT7623_PIN_205_PWM2_FUNC_PWM2>,
338 + <MT7623_PIN_206_PWM3_FUNC_PWM3>,
339 + <MT7623_PIN_207_PWM4_FUNC_PWM4>;
343 + uart2_pins_b: uart@2 {
345 + pinmux = <MT7623_PIN_200_URXD2_FUNC_URXD2>,
346 + <MT7623_PIN_201_UTXD2_FUNC_UTXD2>;
350 + pcie_default: pcie_pin_default {
352 + pinmux = <MT7623_PIN_208_AUD_EXT_CK1_FUNC_PCIE0_PERST_N>,
353 + <MT7623_PIN_209_AUD_EXT_CK2_FUNC_PCIE1_PERST_N>;
360 + pinctrl-names = "default";
361 + pinctrl-0 = <&pwm_pins_a>;
368 + compatible = "mediatek,mt6323-led";
369 + #address-cells = <1>;
375 + default-state = "off";
382 + pinctrl-names = "default";
383 + pinctrl-0 = <&uart2_pins_b>;
388 + vusb33-supply = <®_3p3v>;
389 + vbus-supply = <®_3p3v>;
399 + mediatek,phy-switch = <&hifsys>;
403 + pinctrl-names = "default";
404 + pinctrl-0 = <&pcie_default>;