1 From 915340f70c0594d1f0717fee3eb678fa71206509 Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Wed, 20 Jan 2016 05:27:17 +0100
4 Subject: [PATCH 33/78] soc: mediatek: PMIC wrap: add wrapper callbacks for
7 Split init_reg_clock up into SoC specific callbacks. The patch also
8 reorders the code to avoid the need for callback function prototypes.
10 Signed-off-by: John Crispin <blogic@openwrt.org>
12 drivers/soc/mediatek/mtk-pmic-wrap.c | 70 ++++++++++++++++++----------------
13 1 file changed, 38 insertions(+), 32 deletions(-)
15 diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
16 index 340c4b5..b22b664 100644
17 --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
18 +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
19 @@ -354,24 +354,6 @@ enum pwrap_type {
23 -struct pmic_wrapper_type {
25 - enum pwrap_type type;
29 -static struct pmic_wrapper_type pwrap_mt8135 = {
30 - .regs = mt8135_regs,
31 - .type = PWRAP_MT8135,
32 - .arb_en_all = 0x1ff,
35 -static struct pmic_wrapper_type pwrap_mt8173 = {
36 - .regs = mt8173_regs,
37 - .type = PWRAP_MT8173,
44 @@ -385,6 +367,13 @@ struct pmic_wrapper {
45 void __iomem *bridge_base;
48 +struct pmic_wrapper_type {
50 + enum pwrap_type type;
52 + int (*init_reg_clock)(struct pmic_wrapper *wrp);
55 static inline int pwrap_is_mt8135(struct pmic_wrapper *wrp)
57 return wrp->master->type == PWRAP_MT8135;
58 @@ -578,20 +567,23 @@ static int pwrap_init_sidly(struct pmic_wrapper *wrp)
62 -static int pwrap_init_reg_clock(struct pmic_wrapper *wrp)
63 +static int pwrap_mt8135_init_reg_clock(struct pmic_wrapper *wrp)
65 - if (pwrap_is_mt8135(wrp)) {
66 - pwrap_writel(wrp, 0x4, PWRAP_CSHEXT);
67 - pwrap_writel(wrp, 0x0, PWRAP_CSHEXT_WRITE);
68 - pwrap_writel(wrp, 0x4, PWRAP_CSHEXT_READ);
69 - pwrap_writel(wrp, 0x0, PWRAP_CSLEXT_START);
70 - pwrap_writel(wrp, 0x0, PWRAP_CSLEXT_END);
72 - pwrap_writel(wrp, 0x0, PWRAP_CSHEXT_WRITE);
73 - pwrap_writel(wrp, 0x4, PWRAP_CSHEXT_READ);
74 - pwrap_writel(wrp, 0x2, PWRAP_CSLEXT_START);
75 - pwrap_writel(wrp, 0x2, PWRAP_CSLEXT_END);
77 + pwrap_writel(wrp, 0x4, PWRAP_CSHEXT);
78 + pwrap_writel(wrp, 0x0, PWRAP_CSHEXT_WRITE);
79 + pwrap_writel(wrp, 0x4, PWRAP_CSHEXT_READ);
80 + pwrap_writel(wrp, 0x0, PWRAP_CSLEXT_START);
81 + pwrap_writel(wrp, 0x0, PWRAP_CSLEXT_END);
86 +static int pwrap_mt8173_init_reg_clock(struct pmic_wrapper *wrp)
88 + pwrap_writel(wrp, 0x0, PWRAP_CSHEXT_WRITE);
89 + pwrap_writel(wrp, 0x4, PWRAP_CSHEXT_READ);
90 + pwrap_writel(wrp, 0x2, PWRAP_CSLEXT_START);
91 + pwrap_writel(wrp, 0x2, PWRAP_CSLEXT_END);
95 @@ -699,7 +691,7 @@ static int pwrap_init(struct pmic_wrapper *wrp)
97 pwrap_writel(wrp, 1, PWRAP_WACS2_EN);
99 - ret = pwrap_init_reg_clock(wrp);
100 + ret = wrp->master->init_reg_clock(wrp);
104 @@ -814,6 +806,20 @@ static const struct regmap_config pwrap_regmap_config = {
105 .max_register = 0xffff,
108 +static struct pmic_wrapper_type pwrap_mt8135 = {
109 + .regs = mt8135_regs,
110 + .type = PWRAP_MT8135,
111 + .arb_en_all = 0x1ff,
112 + .init_reg_clock = pwrap_mt8135_init_reg_clock,
115 +static struct pmic_wrapper_type pwrap_mt8173 = {
116 + .regs = mt8173_regs,
117 + .type = PWRAP_MT8173,
118 + .arb_en_all = 0x3f,
119 + .init_reg_clock = pwrap_mt8173_init_reg_clock,
122 static struct of_device_id of_pwrap_match_tbl[] = {
124 .compatible = "mediatek,mt8135-pwrap",