1 From 6e081074df96bf3762c2e6438c383f11a56b0a7e Mon Sep 17 00:00:00 2001
2 From: John Crispin <john@phrozen.org>
3 Date: Thu, 10 Aug 2017 15:58:04 +0200
4 Subject: [PATCH 46/57] net: mediatek: add irq delay
6 Signed-off-by: John Crispin <john@phrozen.org>
8 drivers/net/ethernet/mediatek/mtk_eth_soc.c | 7 ++++++-
9 drivers/net/ethernet/mediatek/mtk_eth_soc.h | 8 +++++++-
10 2 files changed, 13 insertions(+), 2 deletions(-)
12 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
13 +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
14 @@ -1904,8 +1904,13 @@ static int mtk_hw_init(struct mtk_eth *e
15 mtk_w32(eth, 0, MTK_CDMP_EG_CTRL);
17 /* disable delay and normal interrupt */
18 - mtk_w32(eth, 0, MTK_QDMA_DELAY_INT);
20 + mtk_w32(eth, 0x84048404, MTK_PDMA_DELAY_INT);
21 + mtk_w32(eth, 0x84048404, MTK_QDMA_DELAY_INT);
23 mtk_w32(eth, 0, MTK_PDMA_DELAY_INT);
24 + mtk_w32(eth, 0, MTK_QDMA_DELAY_INT);
26 mtk_irq_disable(eth, MTK_QDMA_INT_MASK, ~0);
27 mtk_irq_disable(eth, MTK_PDMA_INT_MASK, ~0);
28 mtk_w32(eth, RST_GL_PSE, MTK_RST_GL);
29 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
30 +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
32 * Copyright (C) 2013-2016 Michael Lee <igvtee@gmail.com>
41 #define MTK_TX_DONE_INT2 BIT(2)
42 #define MTK_TX_DONE_INT1 BIT(1)
43 #define MTK_TX_DONE_INT0 BIT(0)
45 +#define MTK_RX_DONE_INT BIT(30)
46 +#define MTK_TX_DONE_INT BIT(28)
48 #define MTK_RX_DONE_INT (MTK_RX_DONE_INT0 | MTK_RX_DONE_INT1 | \
49 MTK_RX_DONE_INT2 | MTK_RX_DONE_INT3)
50 #define MTK_TX_DONE_INT (MTK_TX_DONE_INT0 | MTK_TX_DONE_INT1 | \
51 MTK_TX_DONE_INT2 | MTK_TX_DONE_INT3)
54 /* QDMA Interrupt grouping registers */
55 #define MTK_QDMA_INT_GRP1 0x1a20
56 #define MTK_QDMA_INT_GRP2 0x1a24