1 From 53eec2c3580e63fdebfc25ae324f30cd8aa4403b Mon Sep 17 00:00:00 2001
2 From: John Crispin <john@phrozen.org>
3 Date: Thu, 10 Aug 2017 16:00:46 +0200
4 Subject: [PATCH 53/57] net: dsa: mediatek: add software phy polling
6 Signed-off-by: John Crispin <john@phrozen.org>
8 drivers/net/dsa/mt7530.c | 38 ++++++++++++++++++++++++++++++++++++++
9 drivers/net/dsa/mt7530.h | 1 +
10 2 files changed, 39 insertions(+)
12 --- a/drivers/net/dsa/mt7530.c
13 +++ b/drivers/net/dsa/mt7530.c
14 @@ -728,6 +728,44 @@ static void mt7530_adjust_link(struct ds
17 mt7623_pad_clk_setup(ds);
19 + u16 lcl_adv = 0, rmt_adv = 0;
21 + u32 mcr = PMCR_USERP_LINK | PMCR_FORCE_MODE;
23 + switch (phydev->speed) {
25 + mcr |= PMCR_FORCE_SPEED_1000;
28 + mcr |= PMCR_FORCE_SPEED_100;
33 + mcr |= PMCR_FORCE_LNK;
35 + if (phydev->duplex) {
36 + mcr |= PMCR_FORCE_FDX;
39 + rmt_adv = LPA_PAUSE_CAP;
40 + if (phydev->asym_pause)
41 + rmt_adv |= LPA_PAUSE_ASYM;
43 + if (phydev->advertising & ADVERTISED_Pause)
44 + lcl_adv |= ADVERTISE_PAUSE_CAP;
45 + if (phydev->advertising & ADVERTISED_Asym_Pause)
46 + lcl_adv |= ADVERTISE_PAUSE_ASYM;
48 + flowctrl = mii_resolve_flowctrl_fdx(lcl_adv, rmt_adv);
50 + if (flowctrl & FLOW_CTRL_TX)
51 + mcr |= PMCR_TX_FC_EN;
52 + if (flowctrl & FLOW_CTRL_RX)
53 + mcr |= PMCR_RX_FC_EN;
55 + mt7530_write(priv, MT7530_PMCR_P(port), mcr);
59 --- a/drivers/net/dsa/mt7530.h
60 +++ b/drivers/net/dsa/mt7530.h
61 @@ -155,6 +155,7 @@ enum mt7530_stp_state {
62 #define PMCR_TX_FC_EN BIT(5)
63 #define PMCR_RX_FC_EN BIT(4)
64 #define PMCR_FORCE_SPEED_1000 BIT(3)
65 +#define PMCR_FORCE_SPEED_100 BIT(2)
66 #define PMCR_FORCE_FDX BIT(1)
67 #define PMCR_FORCE_LNK BIT(0)
68 #define PMCR_COMMON_LINK (PMCR_IFG_XMIT(1) | PMCR_MAC_MODE | \