1 From f9924caf5d952594b2d912e2ec318189ce64cf04 Mon Sep 17 00:00:00 2001
2 From: Chunfeng Yun <chunfeng.yun@mediatek.com>
3 Date: Fri, 25 Dec 2020 15:52:55 +0800
4 Subject: [PATCH] dt-bindings: usb: convert mediatek, musb.txt to YAML schema
6 Convert mediatek,musb.txt to YAML schema mediatek,musb.yaml
8 Cc: Min Guo <min.guo@mediatek.com>
9 Reviewed-by: Rob Herring <robh@kernel.org>
10 Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
11 Link: https://lore.kernel.org/r/20201225075258.33352-8-chunfeng.yun@mediatek.com
12 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
14 .../devicetree/bindings/usb/mediatek,musb.txt | 57 ---------
15 .../bindings/usb/mediatek,musb.yaml | 113 ++++++++++++++++++
16 2 files changed, 113 insertions(+), 57 deletions(-)
17 delete mode 100644 Documentation/devicetree/bindings/usb/mediatek,musb.txt
18 create mode 100644 Documentation/devicetree/bindings/usb/mediatek,musb.yaml
20 --- a/Documentation/devicetree/bindings/usb/mediatek,musb.txt
23 -MediaTek musb DRD/OTG controller
24 --------------------------------------------
27 - - compatible : should be one of:
28 - "mediatek,mt2701-musb"
30 - followed by "mediatek,mtk-musb"
31 - - reg : specifies physical base address and size of
33 - - interrupts : interrupt used by musb controller
34 - - interrupt-names : must be "mc"
35 - - phys : PHY specifier for the OTG phy
36 - - dr_mode : should be one of "host", "peripheral" or "otg",
37 - refer to usb/generic.txt
38 - - clocks : a list of phandle + clock-specifier pairs, one for
39 - each entry in clock-names
40 - - clock-names : must contain "main", "mcu", "univpll"
41 - for clocks of controller
44 - - power-domains : a phandle to USB power domain node to control USB's
47 -Required child nodes:
48 - usb connector node as defined in bindings/connector/usb-connector.yaml
50 - - id-gpios : input GPIO for USB ID pin.
51 - - vbus-gpios : input GPIO for USB VBUS pin.
52 - - vbus-supply : reference to the VBUS regulator, needed when supports
54 - - usb-role-switch : use USB Role Switch to support dual-role switch, see
60 - compatible = "mediatek,mt2701-musb",
61 - "mediatek,mtk-musb";
62 - reg = <0 0x11200000 0 0x1000>;
63 - interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>;
64 - interrupt-names = "mc";
65 - phys = <&u2port2 PHY_TYPE_USB2>;
67 - clocks = <&pericfg CLK_PERI_USB0>,
68 - <&pericfg CLK_PERI_USB0_MCU>,
69 - <&pericfg CLK_PERI_USB_SLV>;
70 - clock-names = "main","mcu","univpll";
71 - power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>;
74 - compatible = "gpio-usb-b-connector", "usb-b-connector";
76 - id-gpios = <&pio 44 GPIO_ACTIVE_HIGH>;
77 - vbus-supply = <&usb_vbus>;
81 +++ b/Documentation/devicetree/bindings/usb/mediatek,musb.yaml
83 +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
84 +# Copyright (c) 2020 MediaTek
87 +$id: http://devicetree.org/schemas/usb/mediatek,musb.yaml#
88 +$schema: http://devicetree.org/meta-schemas/core.yaml#
90 +title: MediaTek MUSB DRD/OTG Controller Device Tree Bindings
93 + - Min Guo <min.guo@mediatek.com>
97 + pattern: '^usb@[0-9a-f]+$'
102 + - mediatek,mt2701-musb
103 + - const: mediatek,mtk-musb
117 + - description: The main/core clock
118 + - description: The system bus clock
119 + - description: The 48Mhz clock
131 + $ref: /schemas/types.yaml#/definitions/flag
132 + description: Support role switch. See usb/generic.txt
142 + description: A phandle to USB power domain node to control USB's MTCMOS
146 + $ref: /connector/usb-connector.yaml#
147 + description: Connector for dual role switch
151 + usb-role-switch: [ 'connector' ]
152 + connector: [ 'usb-role-switch' ]
163 +additionalProperties: false
167 + #include <dt-bindings/clock/mt2701-clk.h>
168 + #include <dt-bindings/gpio/gpio.h>
169 + #include <dt-bindings/interrupt-controller/arm-gic.h>
170 + #include <dt-bindings/interrupt-controller/irq.h>
171 + #include <dt-bindings/phy/phy.h>
172 + #include <dt-bindings/power/mt2701-power.h>
175 + compatible = "mediatek,mt2701-musb", "mediatek,mtk-musb";
176 + reg = <0x11200000 0x1000>;
177 + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>;
178 + interrupt-names = "mc";
179 + phys = <&u2port2 PHY_TYPE_USB2>;
181 + clocks = <&pericfg CLK_PERI_USB0>,
182 + <&pericfg CLK_PERI_USB0_MCU>,
183 + <&pericfg CLK_PERI_USB_SLV>;
184 + clock-names = "main","mcu","univpll";
185 + power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>;
189 + compatible = "gpio-usb-b-connector", "usb-b-connector";
191 + id-gpios = <&pio 44 GPIO_ACTIVE_HIGH>;
192 + vbus-supply = <&usb_vbus>;