1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Aerohive BR200-WP Device Tree Source
5 * Based on: Aerohive HiveAP-330 Device Tree Source
7 * Copyright (C) 2017 Chris Blake <chrisrblake93@gmail.com>
8 * Copyright (C) 2023 Pawel Dembicki <paweldembicki@gmail.com>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/gpio/gpio.h>
15 /include/ "fsl/p1020si-pre.dtsi"
18 model = "Aerohive BR200-WP";
19 compatible = "aerohive,br200-wp";
22 bootargs = "console=ttyS0,9600";
23 bootargs-override = "console=ttyS0,9600 noinitrd";
27 led-boot = &led_attention;
28 led-failsafe = &led_attention;
29 led-running = &led_status;
30 led-upgrade = &led_status;
31 label-mac-device = &enet0;
35 device_type = "memory";
39 /delete-property/ PowerPC,P1020@1; /* P1011 have one core only */
42 board_lbc: lbc: localbus@ffe05000 {
43 reg = <0 0xffe05000 0 0x1000>;
44 ranges = <0x0 0x0 0x0 0xec000000 0x4000000>;
49 compatible = "cfi-flash";
50 reg = <0x0 0x0 0x4000000>;
55 compatible = "fixed-partitions";
65 reg = <0x40000 0x40000>;
70 reg = <0x80000 0x27c0000>;
75 reg = <0x2840000 0x800000>;
80 reg = <0x3040000 0xec0000>;
81 label = "stock-jffs2";
86 reg = <0x3f00000 0x20000>;
91 compatible = "fixed-layout";
95 macaddr_hwinfo_0: macaddr@0 {
96 compatible = "mac-base";
98 #nvmem-cell-cells = <1>;
104 reg = <0x3f20000 0x20000>;
110 reg = <0x3f40000 0x20000>;
111 label = "boot-info-backup";
116 reg = <0x3f60000 0x20000>;
117 label = "u-boot-env";
121 reg = <0x3f80000 0x80000>;
127 reg = <0x0 0x3040000>;
134 board_soc: soc: soc@ffe00000 {
135 ranges = <0x0 0x0 0xffe00000 0x100000>;
160 compatible = "qca,qca8327";
161 #address-cells = <1>;
164 reset-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
167 #address-cells = <1>;
173 phy-handle = <&phy_port1>;
174 nvmem-cells = <&macaddr_hwinfo_0 2>;
175 nvmem-cell-names = "mac-address";
181 phy-handle = <&phy_port2>;
182 nvmem-cells = <&macaddr_hwinfo_0 3>;
183 nvmem-cell-names = "mac-address";
189 phy-handle = <&phy_port3>;
190 nvmem-cells = <&macaddr_hwinfo_0 4>;
191 nvmem-cell-names = "mac-address";
197 phy-handle = <&phy_port4>;
198 nvmem-cells = <&macaddr_hwinfo_0 5>;
199 nvmem-cell-names = "mac-address";
205 phy-handle = <&phy_port5>;
206 nvmem-cells = <&macaddr_hwinfo_0 0>;
207 nvmem-cell-names = "mac-address";
213 phy-mode = "rgmii-id";
232 enet0: ethernet@b0000 {
234 phy-connection-type = "rgmii-id";
235 nvmem-cells = <&macaddr_hwinfo_0 0>;
236 nvmem-cell-names = "mac-address";
244 enet1: ethernet@b1000 {
248 enet2: ethernet@b2000 {
252 gpio0: gpio-controller@fc00 {
265 pci0: pcie@ffe09000 {
269 pci1: pcie@ffe0a000 {
270 reg = <0x0 0xffe0a000 0x0 0x1000>;
271 ranges = <0x2000000 0x0 0xc0000000 0x0 0xc0000000 0x0 0x20000000
272 0x1000000 0x0 0x00000000 0x0 0xffc20000 0x0 0x10000>;
274 reset-gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
277 ranges = <0x2000000 0x0 0xc0000000
278 0x2000000 0x0 0xc0000000
286 reg = <0x0000 0 0 0 0>;
289 nvmem-cells = <&macaddr_hwinfo_0 16>;
290 nvmem-cell-names = "mac-address";
296 compatible = "gpio-leds";
298 led_attention: led-0 {
299 gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
300 label = "amber:status";
301 color = <LED_COLOR_ID_AMBER>;
302 function = LED_FUNCTION_STATUS;
306 gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
307 label = "white:status";
308 color = <LED_COLOR_ID_WHITE>;
309 function = LED_FUNCTION_STATUS;
314 compatible = "gpio-keys";
317 label = "Reset button";
318 gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
319 linux,code = <KEY_RESTART>;
324 /include/ "fsl/p1020si-post.dtsi"
328 stdout-path = "/soc@ffe00000/serial@4500";
333 i-cache-sets = <0x80>;
334 i-cache-size = <0x8000>;
335 i-cache-block-size = <0x20>;
336 d-cache-sets = <0x80>;
337 d-cache-size = <0x8000>;
338 d-cache-block-size = <0x20>;
339 clock-frequency = <0x2756cd00>;
340 bus-frequency = <0x13ab6680>;
341 timebase-frequency = <0x2756cd0>;
346 reg = <0x00 0x00 0x00 0x10000000>;
350 bus-frequency = <0x13ab668>;
354 bus-frequency = <0x13ab6680>;
357 clock-frequency = <0x13ab6680>;
361 clock-frequency = <0x13ab6680>;
366 clock-frequency = <0x1fca055>;
370 clock-frequency = <0x1fca055>;