2 * Aerohive HiveAP-330 Device Tree Source
4 * Copyright (C) 2017 Chris Blake <chrisrblake93@gmail.com>
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
12 /include/ "fsl/p1020si-pre.dtsi"
14 model = "Aerohive HiveAP-330";
15 compatible = "aerohive,hiveap-330";
18 led-boot = &tricolor_green;
19 led-failsafe = &tricolor_red;
20 led-running = &tricolor_green;
21 led-upgrade = &tricolor_red;
22 label-mac-device = &enet0;
26 bootargs-override = "console=ttyS0,9600";
30 device_type = "memory";
33 board_lbc: lbc: localbus@ffe05000 {
34 reg = <0 0xffe05000 0 0x1000>;
35 ranges = <0x0 0x0 0x0 0xec000000 0x4000000>;
40 compatible = "cfi-flash";
41 reg = <0x0 0x0 0x4000000>;
46 compatible = "fixed-partitions";
56 reg = <0x40000 0x40000>;
61 reg = <0x80000 0x27c0000>;
66 reg = <0x2840000 0x800000>;
71 reg = <0x3040000 0xec0000>;
72 label = "stock-jffs2";
76 hwinfo: partition@3f00000 {
77 reg = <0x3f00000 0x20000>;
83 reg = <0x3f20000 0x20000>;
89 reg = <0x3f40000 0x20000>;
90 label = "boot-info-backup";
95 reg = <0x3f60000 0x20000>;
100 reg = <0x3f80000 0x80000>;
106 reg = <0x0 0x3040000>;
113 board_soc: soc: soc@ffe00000 {
114 ranges = <0x0 0x0 0xffe00000 0x100000>;
118 compatible = "atmel,at97sc3204t";
123 compatible = "national,lp5521";
125 clock-mode = /bits/ 8 <2>;
126 tricolor_red: chan0 {
127 chan-name = "hiveap-330:red:tricolor0";
128 led-cur = /bits/ 8 <0x2f>;
129 max-cur = /bits/ 8 <0x5f>;
131 tricolor_green:chan1 {
132 chan-name = "hiveap-330:green:tricolor0";
133 led-cur = /bits/ 8 <0x2f>;
134 max-cur = /bits/ 8 <0x5f>;
137 chan-name = "hiveap-330:blue:tricolor0";
138 led-cur = /bits/ 8 <0x2f>;
139 max-cur = /bits/ 8 <0x5f>;
143 /* Most likely SoC boot config */
145 compatible = "eeprom";
151 phy0: ethernet-phy@0 {
152 interrupts = <3 1 0 0>;
156 phy1: ethernet-phy@1 {
157 interrupts = <2 1 0 0>;
170 enet0: ethernet@b0000 {
172 phy-handle = <&phy0>;
173 phy-connection-type = "rgmii-id";
174 nvmem-cells = <&macaddr_hwinfo_0>;
175 nvmem-cell-names = "mac-address";
178 enet1: ethernet@b1000 {
182 enet2: ethernet@b2000 {
184 phy-handle = <&phy1>;
185 phy-connection-type = "rgmii-id";
186 nvmem-cells = <&macaddr_hwinfo_0>;
187 nvmem-cell-names = "mac-address";
188 mac-address-increment = <1>;
191 gpio0: gpio-controller@fc00 {
204 pci0: pcie@ffe09000 {
205 reg = <0x0 0xffe09000 0x0 0x1000>;
206 ranges = <0x2000000 0x0 0xa0000000 0x0 0xa0000000 0x0 0x20000000
207 0x1000000 0x0 0x00000000 0x0 0xffc30000 0x0 0x10000>;
209 ranges = <0x2000000 0x0 0xa0000000
210 0x2000000 0x0 0xa0000000
219 pci1: pcie@ffe0a000 {
220 reg = <0x0 0xffe0a000 0x0 0x1000>;
221 ranges = <0x2000000 0x0 0xc0000000 0x0 0xc0000000 0x0 0x20000000
222 0x1000000 0x0 0x00000000 0x0 0xffc20000 0x0 0x10000>;
224 ranges = <0x2000000 0x0 0xc0000000
225 0x2000000 0x0 0xc0000000
235 compatible = "gpio-keys";
238 label = "Reset button";
239 gpios = <&gpio0 8 1>; /* active low */
240 linux,code = <0x198>; /* KEY_RESTART */
244 /include/ "fsl/p1020si-post.dtsi"
247 compatible = "nvmem-cells";
248 #address-cells = <1>;
251 macaddr_hwinfo_0: macaddr@0 {