target/linux/mpc85xx/files/arch/powerpc/boot/dts/hiveap-330.dts

   1 /*
   2  * Aerohive HiveAP-330 Device Tree Source
   3  *
   4  * Copyright (C) 2017 Chris Blake <chrisrblake93@gmail.com>
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 /include/ "fsl/p1020si-pre.dtsi"
  13 / {
  14         model = "Aerohive HiveAP-330";
  15         compatible = "aerohive,hiveap-330";
  16
  17         aliases {
  18                 led-boot = &tricolor_green;
  19                 led-failsafe = &tricolor_red;
  20                 led-running = &tricolor_green;
  21                 led-upgrade = &tricolor_red;
  22         };
  23
  24         chosen {
  25                 bootargs-override = "console=ttyS0,9600";
  26         };
  27
  28         memory {
  29                 device_type = "memory";
  30         };
  31
  32         board_lbc: lbc: localbus@ffe05000 {
  33                 reg = <0 0xffe05000 0 0x1000>;
  34                 ranges = <0x0 0x0 0x0 0xec000000 0x4000000>;
  35
  36                 nor@0,0 {
  37                         #address-cells = <1>;
  38                         #size-cells = <1>;
  39                         compatible = "cfi-flash";
  40                         reg = <0x0 0x0 0x4000000>;
  41                         bank-width = <2>;
  42                         device-width = <1>;
  43
  44                         partition@0 {
  45                                 reg = <0x0 0x40000>;
  46                                 label = "dtb";
  47                         };
  48
  49                         partition@40000 {
  50                                 reg = <0x40000 0x40000>;
  51                                 label = "initrd";
  52                         };
  53
  54                         partition@80000 {
  55                                 reg = <0x80000 0x27c0000>;
  56                                 label = "rootfs";
  57                         };
  58
  59                         partition@2840000 {
  60                                 reg = <0x2840000 0x800000>;
  61                                 label = "kernel";
  62                         };
  63
  64                         partition@3040000 {
  65                                 reg = <0x3040000 0xec0000>;
  66                                 label = "stock-jffs2";
  67                                 read-only;
  68                         };
  69
  70                         hwinfo: partition@3f00000 {
  71                                 reg = <0x3f00000 0x20000>;
  72                                 label = "hw-info";
  73                                 read-only;
  74                         };
  75
  76                         partition@3f20000 {
  77                                 reg = <0x3f20000 0x20000>;
  78                                 label = "boot-info";
  79                                 read-only;
  80                         };
  81
  82                         partition@3f40000 {
  83                                 reg = <0x3f40000 0x20000>;
  84                                 label = "boot-info-backup";
  85                                 read-only;
  86                         };
  87
  88                         partition@3f60000 {
  89                                 reg = <0x3f60000 0x20000>;
  90                                 label = "u-boot-env";
  91                         };
  92
  93                         partition@3f80000 {
  94                                 reg = <0x3f80000 0x80000>;
  95                                 label = "u-boot";
  96                                 read-only;
  97                         };
  98
  99                         firmware@0 {
 100                                 reg = <0x0 0x3040000>;
 101                                 label = "firmware";
 102                         };
 103                 };
 104         };
 105
 106         board_soc: soc: soc@ffe00000 {
 107                 ranges = <0x0 0x0 0xffe00000 0x100000>;
 108
 109                 i2c@3100 {
 110                         tpm@29 {
 111                                 compatible = "atmel,at97sc3204t";
 112                                 reg = <0x29>;
 113                         };
 114
 115                         lp5521@32 {
 116                                 compatible = "national,lp5521";
 117                                 reg = <0x32>;
 118                                 clock-mode = /bits/ 8 <2>;
 119                                 tricolor_red: chan0 {
 120                                         chan-name = "hiveap-330:red:tricolor0";
 121                                         led-cur = /bits/ 8 <0x2f>;
 122                                         max-cur = /bits/ 8 <0x5f>;
 123                                 };
 124                                 tricolor_green:chan1 {
 125                                         chan-name = "hiveap-330:green:tricolor0";
 126                                         led-cur = /bits/ 8 <0x2f>;
 127                                         max-cur = /bits/ 8 <0x5f>;
 128                                 };
 129                                 chan2 {
 130                                         chan-name = "hiveap-330:blue:tricolor0";
 131                                         led-cur = /bits/ 8 <0x2f>;
 132                                         max-cur = /bits/ 8 <0x5f>;
 133                                 };
 134                         };
 135
 136                         /* Most likely SoC boot config */
 137                         eeprom@51 {
 138                                 compatible = "eeprom";
 139                                 reg = <0x51>;
 140                         };
 141                 };
 142
 143                 mdio@24000 {
 144                         phy0: ethernet-phy@0 {
 145                                 interrupts = <3 1 0 0>;
 146                                 reg = <0x1>;
 147                         };
 148
 149                         phy1: ethernet-phy@1 {
 150                                 interrupts = <2 1 0 0>;
 151                                 reg = <0x2>;
 152                         };
 153                 };
 154
 155                 mdio@25000 {
 156                         status = "disabled";
 157                 };
 158
 159                 mdio@26000 {
 160                         status = "disabled";
 161                 };
 162
 163                 enet0: ethernet@b0000 {
 164                         status = "okay";
 165                         phy-handle = <&phy0>;
 166                         phy-connection-type = "rgmii-id";
 167                         mtd-mac-address = <&hwinfo 0>;
 168                 };
 169
 170                 enet1: ethernet@b1000 {
 171                         status = "disabled";
 172                 };
 173
 174                 enet2: ethernet@b2000 {
 175                         status = "okay";
 176                         phy-handle = <&phy1>;
 177                         phy-connection-type = "rgmii-id";
 178                         mtd-mac-address = <&hwinfo 0>;
 179                         mtd-mac-address-increment = <1>;
 180                 };
 181
 182                 gpio0: gpio-controller@fc00 {
 183                 };
 184
 185                 usb@22000 {
 186                         phy_type = "ulpi";
 187                         dr_mode = "host";
 188                 };
 189
 190                 usb@23000 {
 191                         status = "disabled";
 192                 };
 193         };
 194
 195         pci0: pcie@ffe09000 {
 196                 reg = <0x0 0xffe09000 0x0 0x1000>;
 197                 ranges = <0x2000000 0x0 0xa0000000 0x0 0xa0000000 0x0 0x20000000
 198                         0x1000000 0x0 0x00000000 0x0 0xffc30000 0x0 0x10000>;
 199                 pcie@0 {
 200                         ranges = <0x2000000 0x0 0xa0000000
 201                                   0x2000000 0x0 0xa0000000
 202                                   0x0 0x20000000
 203
 204                                   0x1000000 0x0 0x0
 205                                   0x1000000 0x0 0x0
 206                                   0x0 0x100000>;
 207                 };
 208         };
 209
 210         pci1: pcie@ffe0a000 {
 211                 reg = <0x0 0xffe0a000 0x0 0x1000>;
 212                 ranges = <0x2000000 0x0 0xc0000000 0x0 0xc0000000 0x0 0x20000000
 213                       0x1000000 0x0 0x00000000 0x0 0xffc20000 0x0 0x10000>;
 214                 pcie@0 {
 215                         ranges = <0x2000000 0x0 0xc0000000
 216                               0x2000000 0x0 0xc0000000
 217                                   0x0 0x20000000
 218
 219                                   0x1000000 0x0 0x0
 220                                   0x1000000 0x0 0x0
 221                                   0x0 0x100000>;
 222                 };
 223         };
 224
 225         buttons {
 226                 compatible = "gpio-keys";
 227
 228                 reset {
 229                         label = "Reset button";
 230                         gpios = <&gpio0 8 1>; /* active low */
 231                         linux,code = <0x198>; /* KEY_RESTART */
 232                 };
 233         };
 234 };
 235 /include/ "fsl/p1020si-post.dtsi"