1 // SPDX-License-Identifier: GPL-2.0-or-later or MIT
3 #include <dt-bindings/input/input.h>
4 #include <dt-bindings/gpio/gpio.h>
6 /include/ "fsl/p1020si-pre.dtsi"
8 model = "Enterasys WS-AP3710i";
9 compatible = "enterasys,ws-ap3710i";
14 led-boot = &led_power_green;
15 led-failsafe = &led_power_red;
16 led-running = &led_power_green;
17 led-upgrade = &led_power_red;
18 label-mac-device = &enet0;
22 bootargs-override = "console=ttyS0,115200";
23 stdout-path = &serial0;
27 device_type = "memory";
31 compatible = "gpio-leds";
34 gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>;
35 label = "ws-ap3710i:green:radio1";
36 linux,default-trigger = "phy0tpt";
40 gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>;
41 label = "ws-ap3710i:green:radio2";
42 linux,default-trigger = "phy1tpt";
45 led_power_green: power_green {
46 gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
47 label = "ws-ap3710i:green:power";
50 led_power_red: power_red {
51 gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
52 label = "ws-ap3710i:red:power";
57 compatible = "gpio-keys";
60 label = "Reset button";
61 gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
62 linux,code = <KEY_RESTART>;
66 lbc: localbus@ffe05000 {
67 reg = <0 0xffe05000 0 0x1000>;
68 ranges = <0x0 0x0 0x0 0xee000000 0x2000000>;
73 compatible = "cfi-flash";
74 reg = <0x0 0x0 0x2000000>;
79 compatible = "fixed-partitions";
84 compatible = "denx,uimage";
85 reg = <0x0 0x1d80000>;
90 reg = <0x1d80000 0x80000>;
96 reg = <0x1e00000 0x100000>;
102 reg = <0x1f00000 0x20000>;
108 reg = <0x1f20000 0x20000>;
117 ranges = <0x0 0x0 0xffe00000 0x100000>;
119 gpio0: gpio-controller@fc00 {
123 phy4: ethernet-phy@4 {
125 reset-gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
129 enet0: ethernet@b0000 {
130 phy-connection-type = "rgmii-id";
131 phy-handle = <&phy4>;
134 enet1: ethernet@b1000 {
138 enet2: ethernet@b2000 {
151 pci0: pcie@ffe09000 {
152 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
153 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
154 reg = <0 0xffe09000 0 0x1000>;
156 /* Filled by U-Boot */
157 bus-range = <0x00 0x01>;
158 dma-ranges = <0x2000000 0x00 0xfff00000 0x00 0xffe00000
159 0x00 0x100000 0x42000000 0x00 0x00 0x00
160 0x00 0x00 0x10000000>;
163 ranges = <0x2000000 0x0 0xa0000000
164 0x2000000 0x0 0xa0000000
173 pci1: pcie@ffe0a000 {
174 reg = <0 0xffe0a000 0 0x1000>;
175 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
176 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
178 /* Filled by U-Boot */
179 bus-range = <0x00 0x01>;
180 dma-ranges = <0x2000000 0x00 0xfff00000 0x00
181 0xffe00000 0x00 0x100000 0x42000000
182 0x00 0x00 0x00 0x00 0x00 0x10000000>;
185 ranges = <0x2000000 0x0 0x80000000
186 0x2000000 0x0 0x80000000
196 /include/ "fsl/p1020si-post.dtsi"
201 bus-frequency = <399999996>;
202 timebase-frequency = <50000000>;
203 clock-frequency = <799999992>;
204 d-cache-block-size = <0x20>;
205 d-cache-size = <0x8000>;
206 d-cache-sets = <0x80>;
207 i-cache-block-size = <0x20>;
208 i-cache-size = <0x8000>;
209 i-cache-sets = <0x80>;
210 cpu-release-addr = <0x0 0x0ffff280>;
212 enable-method = "spin-table";
216 bus-frequency = <399999996>;
217 timebase-frequency = <50000000>;
218 clock-frequency = <799999992>;
219 d-cache-block-size = <0x20>;
220 d-cache-size = <0x8000>;
221 d-cache-sets = <0x80>;
222 i-cache-block-size = <0x20>;
223 i-cache-size = <0x8000>;
224 i-cache-sets = <0x80>;
225 cpu-release-addr = <0x0 0x0ffff2a0>;
227 enable-method = "spin-table";
232 reg = <0x0 0x0 0x0 0x10000000>;
236 #address-cells = <2>;
240 cpu1-bootpage@ff00000 {
241 /* Reserve upper 1 MB for second-core-bootpage */
242 reg = <0x0 0xff00000 0x0 0x100000>;
247 bus-frequency = <399999996>;
250 clock-frequency = <399999996>;
254 clock-frequency = <399999996>;
258 clock-frequency = <399999996>;
263 bus-frequency = <24999999>;
268 rx-stash-idx = <0x00>;
269 rx-stash-len = <0x60>;
274 rx-stash-idx = <0x00>;
275 rx-stash-len = <0x60>;
280 * For the OpenWrt 22.03 release, since Linux 5.10.138 now uses
281 * aliases to determine PCI domain numbers, drop aliases so as not to
282 * change the sysfs path of our wireless netdevs.
287 /delete-property/ pci0;
288 /delete-property/ pci1;