1 From 6e3022aeb5d221af838ad43a2163374aecacf929 Mon Sep 17 00:00:00 2001
2 From: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
3 Date: Thu, 14 Nov 2013 18:25:36 -0300
4 Subject: [PATCH 150/203] mtd: nand: pxa3xx: Add a read/write buffers markers
6 In preparation to support multiple (aka chunked, aka splitted)
7 page I/O, this commit adds 'data_buff_pos' and 'oob_buff_pos' fields
8 to keep track of where the next read (or write) should be done.
10 This will allow multiple calls to handle_data_pio() to continue
11 the read (or write) operation.
13 Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
14 Tested-by: Daniel Mack <zonque@gmail.com>
15 Signed-off-by: Brian Norris <computersforpeace@gmail.com>
17 drivers/mtd/nand/pxa3xx_nand.c | 40 +++++++++++++++++++++++++++++-----------
18 1 file changed, 29 insertions(+), 11 deletions(-)
20 --- a/drivers/mtd/nand/pxa3xx_nand.c
21 +++ b/drivers/mtd/nand/pxa3xx_nand.c
22 @@ -176,6 +176,8 @@ struct pxa3xx_nand_info {
23 unsigned int buf_start;
24 unsigned int buf_count;
25 unsigned int buf_size;
26 + unsigned int data_buff_pos;
27 + unsigned int oob_buff_pos;
31 @@ -338,11 +340,12 @@ static void pxa3xx_nand_set_timing(struc
32 * spare and ECC configuration.
33 * Only applicable to READ0, READOOB and PAGEPROG commands.
35 -static void pxa3xx_set_datasize(struct pxa3xx_nand_info *info)
36 +static void pxa3xx_set_datasize(struct pxa3xx_nand_info *info,
37 + struct mtd_info *mtd)
39 int oob_enable = info->reg_ndcr & NDCR_SPARE_EN;
41 - info->data_size = info->fifo_size;
42 + info->data_size = mtd->writesize;
46 @@ -430,26 +433,39 @@ static void disable_int(struct pxa3xx_na
48 static void handle_data_pio(struct pxa3xx_nand_info *info)
50 + unsigned int do_bytes = min(info->data_size, info->fifo_size);
52 switch (info->state) {
53 case STATE_PIO_WRITING:
54 - __raw_writesl(info->mmio_base + NDDB, info->data_buff,
55 - DIV_ROUND_UP(info->data_size, 4));
56 + __raw_writesl(info->mmio_base + NDDB,
57 + info->data_buff + info->data_buff_pos,
58 + DIV_ROUND_UP(do_bytes, 4));
60 if (info->oob_size > 0)
61 - __raw_writesl(info->mmio_base + NDDB, info->oob_buff,
62 - DIV_ROUND_UP(info->oob_size, 4));
63 + __raw_writesl(info->mmio_base + NDDB,
64 + info->oob_buff + info->oob_buff_pos,
65 + DIV_ROUND_UP(info->oob_size, 4));
67 case STATE_PIO_READING:
68 - __raw_readsl(info->mmio_base + NDDB, info->data_buff,
69 - DIV_ROUND_UP(info->data_size, 4));
70 + __raw_readsl(info->mmio_base + NDDB,
71 + info->data_buff + info->data_buff_pos,
72 + DIV_ROUND_UP(do_bytes, 4));
74 if (info->oob_size > 0)
75 - __raw_readsl(info->mmio_base + NDDB, info->oob_buff,
76 - DIV_ROUND_UP(info->oob_size, 4));
77 + __raw_readsl(info->mmio_base + NDDB,
78 + info->oob_buff + info->oob_buff_pos,
79 + DIV_ROUND_UP(info->oob_size, 4));
82 dev_err(&info->pdev->dev, "%s: invalid state %d\n", __func__,
87 + /* Update buffer pointers for multi-page read/write */
88 + info->data_buff_pos += do_bytes;
89 + info->oob_buff_pos += info->oob_size;
90 + info->data_size -= do_bytes;
94 @@ -616,6 +632,8 @@ static void prepare_start_command(struct
98 + info->data_buff_pos = 0;
99 + info->oob_buff_pos = 0;
102 info->retcode = ERR_NONE;
103 @@ -626,7 +644,7 @@ static void prepare_start_command(struct
104 case NAND_CMD_PAGEPROG:
106 case NAND_CMD_READOOB:
107 - pxa3xx_set_datasize(info);
108 + pxa3xx_set_datasize(info, mtd);