28ec7d8897fa17b46a097248fee46fb85284d750
[openwrt/openwrt.git] / target / linux / mvebu / patches-3.10 / 0157-mtd-nand-pxa3xx-Consolidate-ECC-initialization.patch
1 From 70c36de37f357f38b5a56292534133d75e7d8870 Mon Sep 17 00:00:00 2001
2 From: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
3 Date: Mon, 25 Nov 2013 12:36:18 -0300
4 Subject: [PATCH 157/203] mtd: nand: pxa3xx: Consolidate ECC initialization
5
6 In order to avoid code duplication, let's consolidate the ECC setting
7 for all SoC variants. Such decision is based on page size and ECC
8 strength requirements.
9
10 Also, provide a default value for the case where such ECC information
11 is not provided (non-ONFI devices).
12
13 Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
14 ---
15 drivers/mtd/nand/pxa3xx_nand.c | 40 ++++++++++++++++------------------------
16 1 file changed, 16 insertions(+), 24 deletions(-)
17
18 --- a/drivers/mtd/nand/pxa3xx_nand.c
19 +++ b/drivers/mtd/nand/pxa3xx_nand.c
20 @@ -1335,13 +1335,9 @@ static int pxa3xx_nand_sensing(struct px
21
22 static int pxa_ecc_init(struct pxa3xx_nand_info *info,
23 struct nand_ecc_ctrl *ecc,
24 - int strength, int page_size)
25 + int strength, int ecc_stepsize, int page_size)
26 {
27 - /*
28 - * We don't use strength here as the PXA variant
29 - * is used with non-ONFI compliant devices.
30 - */
31 - if (page_size == 2048) {
32 + if (strength == 1 && ecc_stepsize == 512 && page_size == 2048) {
33 info->chunk_size = 2048;
34 info->spare_size = 40;
35 info->ecc_size = 24;
36 @@ -1350,7 +1346,7 @@ static int pxa_ecc_init(struct pxa3xx_na
37 ecc->strength = 1;
38 return 1;
39
40 - } else if (page_size == 512) {
41 + } else if (strength == 1 && ecc_stepsize == 512 && page_size == 512) {
42 info->chunk_size = 512;
43 info->spare_size = 8;
44 info->ecc_size = 8;
45 @@ -1358,19 +1354,12 @@ static int pxa_ecc_init(struct pxa3xx_na
46 ecc->size = 512;
47 ecc->strength = 1;
48 return 1;
49 - }
50 - return 0;
51 -}
52
53 -static int armada370_ecc_init(struct pxa3xx_nand_info *info,
54 - struct nand_ecc_ctrl *ecc,
55 - int strength, int ecc_stepsize, int page_size)
56 -{
57 /*
58 * Required ECC: 4-bit correction per 512 bytes
59 * Select: 16-bit correction per 2048 bytes
60 */
61 - if (strength == 4 && ecc_stepsize == 512 && page_size == 4096) {
62 + } else if (strength == 4 && ecc_stepsize == 512 && page_size == 4096) {
63 info->ecc_bch = 1;
64 info->chunk_size = 2048;
65 info->spare_size = 32;
66 @@ -1411,6 +1400,7 @@ static int pxa3xx_nand_scan(struct mtd_i
67 uint32_t id = -1;
68 uint64_t chipsize;
69 int i, ret, num;
70 + uint16_t ecc_strength, ecc_step;
71
72 if (pdata->keep_config && !pxa3xx_nand_detect_config(info))
73 goto KEEP_CONFIG;
74 @@ -1505,15 +1495,17 @@ KEEP_CONFIG:
75 }
76 }
77
78 - if (info->variant == PXA3XX_NAND_VARIANT_ARMADA370)
79 - ret = armada370_ecc_init(info, &chip->ecc,
80 - chip->ecc_strength_ds,
81 - chip->ecc_step_ds,
82 - mtd->writesize);
83 - else
84 - ret = pxa_ecc_init(info, &chip->ecc,
85 - chip->ecc_strength_ds,
86 - mtd->writesize);
87 + ecc_strength = chip->ecc_strength_ds;
88 + ecc_step = chip->ecc_step_ds;
89 +
90 + /* Set default ECC strength requirements on non-ONFI devices */
91 + if (ecc_strength < 1 && ecc_step < 1) {
92 + ecc_strength = 1;
93 + ecc_step = 512;
94 + }
95 +
96 + ret = pxa_ecc_init(info, &chip->ecc, ecc_strength,
97 + ecc_step, mtd->writesize);
98 if (!ret) {
99 dev_err(&info->pdev->dev,
100 "ECC strength %d at page size %d is not supported\n",