lantiq: fix compile error
[openwrt/openwrt.git] / target / linux / mvebu / patches-3.18 / 020-ARM-mvebu-Add-a-number-of-pinctrl-functions.patch
1 From 91b4c91f919abffa72cbf7545a944252f8e4f775 Mon Sep 17 00:00:00 2001
2 From: Maxime Ripard <maxime.ripard@free-electrons.com>
3 Date: Thu, 8 Jan 2015 18:38:08 +0100
4 Subject: [PATCH 3/4] ARM: mvebu: Add a number of pinctrl functions
5
6 Some pinctrl functions can be shared with all DTS out there, since they are
7 generic, SoC-wide muxing options. Add a number of these to the DTSI to avoid
8 duplication.
9
10 Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
11 Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
12 Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
13 Signed-off-by: Andrew Lunn <andrew@lunn.ch>
14 ---
15 arch/arm/boot/dts/armada-38x.dtsi | 39 +++++++++++++++++++++++++++++++++++++++
16 1 file changed, 39 insertions(+)
17
18 --- a/arch/arm/boot/dts/armada-38x.dtsi
19 +++ b/arch/arm/boot/dts/armada-38x.dtsi
20 @@ -196,6 +196,45 @@
21 pinctrl {
22 compatible = "marvell,mv88f6820-pinctrl";
23 reg = <0x18000 0x20>;
24 +
25 + ge0_rgmii_pins: ge-rgmii-pins-0 {
26 + marvell,pins = "mpp6", "mpp7", "mpp8",
27 + "mpp9", "mpp10", "mpp11",
28 + "mpp12", "mpp13", "mpp14",
29 + "mpp15", "mpp16", "mpp17";
30 + marvell,function = "ge0";
31 + };
32 +
33 + i2c0_pins: i2c-pins-0 {
34 + marvell,pins = "mpp2", "mpp3";
35 + marvell,function = "i2c0";
36 + };
37 +
38 + mdio_pins: mdio-pins {
39 + marvell,pins = "mpp4", "mpp5";
40 + marvell,function = "ge";
41 + };
42 +
43 + ref_clk0_pins: ref-clk-pins-0 {
44 + marvell,pins = "mpp45";
45 + marvell,function = "ref";
46 + };
47 +
48 + spi1_pins: spi-pins-1 {
49 + marvell,pins = "mpp56", "mpp57", "mpp58",
50 + "mpp59";
51 + marvell,function = "spi1";
52 + };
53 +
54 + uart0_pins: uart-pins-0 {
55 + marvell,pins = "mpp0", "mpp1";
56 + marvell,function = "ua0";
57 + };
58 +
59 + uart1_pins: uart-pins-1 {
60 + marvell,pins = "mpp19", "mpp20";
61 + marvell,function = "ua1";
62 + };
63 };
64
65 gpio0: gpio@18100 {