1 From daa2e3bdbb0b3e691cf20a042350817310cb8cb5 Mon Sep 17 00:00:00 2001
2 From: Evan Wang <xswang@marvell.com>
3 Date: Fri, 13 Apr 2018 12:32:31 +0800
4 Subject: [PATCH] ata: ahci: mvebu: override ahci_stop_engine for mvebu AHCI
6 There is an issue(Errata Ref#226) that the SATA can not be
7 detected via SATA Port-MultiPlayer(PMP) with following
9 ata1.15: PMP product ID mismatch
10 ata1.15: SATA link up 6.0 Gbps (SStatus 133 SControl 300)
11 ata1.15: Port Multiplier vendor mismatch '0x1b4b'!='0x0'
12 ata1.15: PMP revalidation failed (errno=-19)
14 After debugging, the reason is found that the value Port-x
15 FIS-based Switching Control(PxFBS@0x40) become wrong.
16 According to design, the bits[11:8, 0] of register PxFBS
17 are cleared when Port Command and Status (0x18) bit[0]
18 changes its value from 1 to 0, i.e. falling edge of Port
19 Command and Status bit[0] sends PULSE that resets PxFBS
21 So it needs a mvebu SATA WA to save the port PxFBS register
22 before PxCMD ST write and restore it afterwards.
24 This patch implements the WA in a separate function of
25 ahci_mvebu_stop_engine to override ahci_stop_gngine.
27 Signed-off-by: Evan Wang <xswang@marvell.com>
28 Cc: Ofer Heifetz <oferh@marvell.com>
29 Cc: Tejun Heo <tj@kernel.org>
30 Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
31 Signed-off-by: Tejun Heo <tj@kernel.org>
33 drivers/ata/ahci_mvebu.c | 56 ++++++++++++++++++++++++++++++++++++++++++++++++
34 1 file changed, 56 insertions(+)
36 diff --git a/drivers/ata/ahci_mvebu.c b/drivers/ata/ahci_mvebu.c
37 index de7128d81e9cc..0045dacd814b4 100644
38 --- a/drivers/ata/ahci_mvebu.c
39 +++ b/drivers/ata/ahci_mvebu.c
40 @@ -62,6 +62,60 @@ static void ahci_mvebu_regret_option(struct ahci_host_priv *hpriv)
41 writel(0x80, hpriv->mmio + AHCI_VENDOR_SPECIFIC_0_DATA);
45 + * ahci_mvebu_stop_engine
47 + * @ap: Target ata port
49 + * Errata Ref#226 - SATA Disk HOT swap issue when connected through
50 + * Port Multiplier in FIS-based Switching mode.
52 + * To avoid the issue, according to design, the bits[11:8, 0] of
53 + * register PxFBS are cleared when Port Command and Status (0x18) bit[0]
54 + * changes its value from 1 to 0, i.e. falling edge of Port
55 + * Command and Status bit[0] sends PULSE that resets PxFBS
58 + * This function is used to override function of "ahci_stop_engine"
59 + * from libahci.c by adding the mvebu work around(WA) to save PxFBS
60 + * value before the PxCMD ST write of 0, then restore PxFBS value.
62 + * Return: 0 on success; Error code otherwise.
64 +int ahci_mvebu_stop_engine(struct ata_port *ap)
66 + void __iomem *port_mmio = ahci_port_base(ap);
69 + tmp = readl(port_mmio + PORT_CMD);
71 + /* check if the HBA is idle */
72 + if ((tmp & (PORT_CMD_START | PORT_CMD_LIST_ON)) == 0)
75 + /* save the port PxFBS register for later restore */
76 + port_fbs = readl(port_mmio + PORT_FBS);
78 + /* setting HBA to idle */
79 + tmp &= ~PORT_CMD_START;
80 + writel(tmp, port_mmio + PORT_CMD);
83 + * bit #15 PxCMD signal doesn't clear PxFBS,
84 + * restore the PxFBS register right after clearing the PxCMD ST,
85 + * no need to wait for the PxCMD bit #15.
87 + writel(port_fbs, port_mmio + PORT_FBS);
89 + /* wait for engine to stop. This could be as long as 500 msec */
90 + tmp = ata_wait_register(ap, port_mmio + PORT_CMD,
91 + PORT_CMD_LIST_ON, PORT_CMD_LIST_ON, 1, 500);
92 + if (tmp & PORT_CMD_LIST_ON)
98 #ifdef CONFIG_PM_SLEEP
99 static int ahci_mvebu_suspend(struct platform_device *pdev, pm_message_t state)
101 @@ -112,6 +166,8 @@ static int ahci_mvebu_probe(struct platform_device *pdev)
105 + hpriv->stop_engine = ahci_mvebu_stop_engine;
107 if (of_device_is_compatible(pdev->dev.of_node,
108 "marvell,armada-380-ahci")) {
109 dram = mv_mbus_dram_info();