1 From b4ac5820bdc98ee24a2f73b8bd7fdf7f82db3a46 Mon Sep 17 00:00:00 2001
2 From: Marko Ratkaj <marko.ratkaj@sartura.hr>
3 Date: Fri, 7 Apr 2017 11:02:30 +0200
4 Subject: [PATCH 2/2] add ClearFog Base device tree files
6 Signed-off-by: Marko Ratkaj <marko.ratkaj@sartura.hr>
8 arch/arm/boot/dts/Makefile | 1 +
9 arch/arm/boot/dts/armada-388-clearfog-base.dts | 161 ++++++++++++
10 arch/arm/boot/dts/armada-388-clearfog.dtsi | 282 +++++++++++++++++++++
11 .../dts/armada-38x-solidrun-microsom-emmc.dtsi | 62 +++++
12 4 files changed, 506 insertions(+)
13 create mode 100644 arch/arm/boot/dts/armada-388-clearfog-base.dts
14 create mode 100644 arch/arm/boot/dts/armada-388-clearfog.dtsi
15 create mode 100644 arch/arm/boot/dts/armada-38x-solidrun-microsom-emmc.dtsi
17 --- a/arch/arm/boot/dts/Makefile
18 +++ b/arch/arm/boot/dts/Makefile
19 @@ -925,6 +925,7 @@ dtb-$(CONFIG_MACH_ARMADA_38X) += \
20 armada-385-linksys-shelby.dtb \
21 armada-388-clearfog.dtb \
22 armada-388-clearfog-pro.dtb \
23 + armada-388-clearfog-base.dtb \
28 +++ b/arch/arm/boot/dts/armada-388-clearfog-base.dts
31 + * Device Tree file for SolidRun Clearfog Base revision A1 rev 2.0 (88F6828)
33 + * Copyright (C) 2015 Russell King
35 + * This board is in development; the contents of this file work with
36 + * the A1 rev 2.0 of the board, which does not represent final
37 + * production board. Things will change, don't expect this file to
38 + * remain compatible info the future.
40 + * This file is dual-licensed: you can use it either under the terms
41 + * of the GPL or the X11 license, at your option. Note that this dual
42 + * licensing only applies to this file, and not this project as a
45 + * a) This file is free software; you can redistribute it and/or
46 + * modify it under the terms of the GNU General Public License
47 + * version 2 as published by the Free Software Foundation.
49 + * This file is distributed in the hope that it will be useful,
50 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
51 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
52 + * GNU General Public License for more details.
54 + * Or, alternatively,
56 + * b) Permission is hereby granted, free of charge, to any person
57 + * obtaining a copy of this software and associated documentation
58 + * files (the "Software"), to deal in the Software without
59 + * restriction, including without limitation the rights to use,
60 + * copy, modify, merge, publish, distribute, sublicense, and/or
61 + * sell copies of the Software, and to permit persons to whom the
62 + * Software is furnished to do so, subject to the following
65 + * The above copyright notice and this permission notice shall be
66 + * included in all copies or substantial portions of the Software.
68 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
69 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
70 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
71 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
72 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
73 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
74 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
75 + * OTHER DEALINGS IN THE SOFTWARE.
79 +#include "armada-388-clearfog.dtsi"
80 +#include "armada-38x-solidrun-microsom-emmc.dtsi"
83 + model = "SolidRun Clearfog Base A1";
84 + compatible = "solidrun,clearfog-base-a1",
85 + "solidrun,clearfog-a1", "marvell,armada388",
86 + "marvell,armada385", "marvell,armada380";
89 + compatible = "gpio-keys";
90 + pinctrl-0 = <&rear_button_pins>;
91 + pinctrl-names = "default";
94 + /* The rear SW3 button */
95 + label = "Rear Button";
96 + gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
98 + linux,code = <BTN_0>;
110 + gpios = <19 GPIO_ACTIVE_LOW>;
112 + line-name = "phy1-reset";
117 + pinctrl-0 = <&mdio_pins µsom_phy_clk_pins &clearfog_phy_pins>;
118 + phy1: ethernet-phy@1 {
120 + * Annoyingly, the marvell phy driver configures the LED
121 + * register, rather than preserving reset-loaded setting.
122 + * We undo that rubbish here.
124 + marvell,reg-init = <3 16 0 0x101e>;
131 + clearfog_phy_pins: clearfog-phy-pins {
132 + marvell,pins = "mpp19";
133 + marvell,function = "gpio";
135 + rear_button_pins: rear-button-pins {
136 + marvell,pins = "mpp44";
137 + marvell,function = "gpio";
143 +18: pu gpio pca9655 int
145 +20: pu gpio sd0 detect
147 +22: pd gpio mikro int
150 +24: ua1:rxd mikro rx
151 +25: ua1:txd mikro tx
155 +29: pd gpio mikro rst
171 +43: spi1:cs2 mikro cs
172 +44: gpio rear button sw3
173 +45: ref:clk_out0 phy#0 clock
174 +46: ref:clk_out1 phy#1 clock
177 +48: gpio J18 spare gpio
178 +49: gpio U10 I2C_IRQ(GNSS)
186 +56: pu spi1:mosi mikro mosi
187 +57: pd spi1:sck mikro sck
188 +58: spi1:miso mikro miso
192 +++ b/arch/arm/boot/dts/armada-388-clearfog.dtsi
195 + * Device Tree include file for SolidRun Clearfog 88F6828 based boards
197 + * Copyright (C) 2015 Russell King
199 + * This board is in development; the contents of this file work with
200 + * the A1 rev 2.0 of the board, which does not represent final
201 + * production board. Things will change, don't expect this file to
202 + * remain compatible info the future.
204 + * This file is dual-licensed: you can use it either under the terms
205 + * of the GPL or the X11 license, at your option. Note that this dual
206 + * licensing only applies to this file, and not this project as a
209 + * a) This file is free software; you can redistribute it and/or
210 + * modify it under the terms of the GNU General Public License
211 + * version 2 as published by the Free Software Foundation.
213 + * This file is distributed in the hope that it will be useful
214 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
215 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
216 + * GNU General Public License for more details.
218 + * Or, alternatively
220 + * b) Permission is hereby granted, free of charge, to any person
221 + * obtaining a copy of this software and associated documentation
222 + * files (the "Software"), to deal in the Software without
223 + * restriction, including without limitation the rights to use
224 + * copy, modify, merge, publish, distribute, sublicense, and/or
225 + * sell copies of the Software, and to permit persons to whom the
226 + * Software is furnished to do so, subject to the following
229 + * The above copyright notice and this permission notice shall be
230 + * included in all copies or substantial portions of the Software.
232 + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
233 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
234 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
235 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
236 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
237 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
238 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
239 + * OTHER DEALINGS IN THE SOFTWARE.
242 +#include "armada-388.dtsi"
243 +#include "armada-38x-solidrun-microsom.dtsi"
247 + /* So that mvebu u-boot can update the MAC addresses */
254 + stdout-path = "serial0:115200n8";
257 + reg_3p3v: regulator-3p3v {
258 + compatible = "regulator-fixed";
259 + regulator-name = "3P3V";
260 + regulator-min-microvolt = <3300000>;
261 + regulator-max-microvolt = <3300000>;
262 + regulator-always-on;
279 + cd-gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
281 + pinctrl-0 = <µsom_sdhci_pins
282 + &clearfog_sdhci_cd_pins>;
283 + pinctrl-names = "default";
285 + vmmc = <®_3p3v>;
290 + /* CON3, nearest power. */
303 + * The two PCIe units are accessible through
304 + * the mini-PCIe connectors on the board.
307 + /* Port 1, Lane 0. CON3, nearest power. */
308 + reset-gpios = <&expander0 1 GPIO_ACTIVE_LOW>;
315 + compatible = "sff,sfp";
317 + los-gpio = <&expander0 12 GPIO_ACTIVE_HIGH>;
318 + moddef0-gpio = <&expander0 15 GPIO_ACTIVE_LOW>;
319 + sfp,ethernet = <ð2>;
320 + tx-disable-gpio = <&expander0 14 GPIO_ACTIVE_HIGH>;
321 + tx-fault-gpio = <&expander0 13 GPIO_ACTIVE_HIGH>;
326 + /* ethernet@30000 */
327 + bm,pool-long = <2>;
328 + bm,pool-short = <1>;
329 + buffer-manager = <&bm>;
330 + phy-mode = "sgmii";
335 + /* ethernet@34000 */
336 + bm,pool-long = <3>;
337 + bm,pool-short = <1>;
338 + buffer-manager = <&bm>;
339 + managed = "in-band-status";
340 + phy-mode = "sgmii";
345 + clock-frequency = <400000>;
346 + pinctrl-0 = <&i2c0_pins>;
347 + pinctrl-names = "default";
351 + * PCA9655 GPIO expander, up to 1MHz clock.
357 + * 5-USB3 overcurrent
366 + * 14-SFP_TX_DISABLE
369 + expander0: gpio-expander@20 {
371 + * This is how it should be:
372 + * compatible = "onnn,pca9655", "nxp,pca9555";
373 + * but you can't do this because of the way I2C works.
375 + compatible = "nxp,pca9555";
382 + gpios = <0 GPIO_ACTIVE_LOW>;
384 + line-name = "pcie1.0-clkreq";
386 + pcie1_0_w_disable {
388 + gpios = <3 GPIO_ACTIVE_LOW>;
390 + line-name = "pcie1.0-w-disable";
394 + gpios = <5 GPIO_ACTIVE_LOW>;
396 + line-name = "usb3-current-limit";
400 + gpios = <6 GPIO_ACTIVE_HIGH>;
402 + line-name = "usb3-power";
406 + gpios = <11 GPIO_ACTIVE_HIGH>;
408 + line-name = "m.2 devslp";
412 + /* The MCP3021 supports standard and fast modes */
413 + mikrobus_adc: mcp3021@4c {
414 + compatible = "microchip,mcp3021";
421 + * Routed to SFP, mikrobus, and PCIe.
422 + * SFP limits this to 100kHz, and requires an AT24C01A/02/04 with
423 + * address pins tied low, which takes addresses 0x50 and 0x51.
424 + * Mikrobus doesn't specify beyond an I2C bus being present.
425 + * PCIe uses ARP to assign addresses, or 0x63-0x64.
427 + clock-frequency = <100000>;
428 + pinctrl-0 = <&clearfog_i2c1_pins>;
429 + pinctrl-names = "default";
434 + clearfog_i2c1_pins: i2c1-pins {
435 + /* SFP, PCIe, mSATA, mikrobus */
436 + marvell,pins = "mpp26", "mpp27";
437 + marvell,function = "i2c1";
439 + clearfog_sdhci_cd_pins: clearfog-sdhci-cd-pins {
440 + marvell,pins = "mpp20";
441 + marvell,function = "gpio";
443 + mikro_pins: mikro-pins {
444 + /* int: mpp22 rst: mpp29 */
445 + marvell,pins = "mpp22", "mpp29";
446 + marvell,function = "gpio";
448 + mikro_spi_pins: mikro-spi-pins {
449 + marvell,pins = "mpp43";
450 + marvell,function = "spi1";
452 + mikro_uart_pins: mikro-uart-pins {
453 + marvell,pins = "mpp24", "mpp25";
454 + marvell,function = "ua1";
460 + * Add SPI CS pins for clearfog:
461 + * CS0: W25Q32 (not populated on uSOM)
462 + * CS1: PIC microcontroller (Pro models)
465 + pinctrl-0 = <&spi1_pins &mikro_spi_pins>;
466 + pinctrl-names = "default";
471 + /* mikrobus uart */
472 + pinctrl-0 = <&mikro_uart_pins>;
473 + pinctrl-names = "default";
477 +++ b/arch/arm/boot/dts/armada-38x-solidrun-microsom-emmc.dtsi
480 + * Device Tree file for SolidRun Armada 38x Microsom add-on for eMMC
482 + * Copyright (C) 2015 Russell King
484 + * This board is in development; the contents of this file work with
485 + * the A1 rev 2.0 of the board, which does not represent final
486 + * production board. Things will change, don't expect this file to
487 + * remain compatible info the future.
489 + * This file is dual-licensed: you can use it either under the terms
490 + * of the GPL or the X11 license, at your option. Note that this dual
491 + * licensing only applies to this file, and not this project as a
494 + * a) This file is free software; you can redistribute it and/or
495 + * modify it under the terms of the GNU General Public License
496 + * version 2 as published by the Free Software Foundation.
498 + * This file is distributed in the hope that it will be useful
499 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
500 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
501 + * GNU General Public License for more details.
503 + * Or, alternatively
505 + * b) Permission is hereby granted, free of charge, to any person
506 + * obtaining a copy of this software and associated documentation
507 + * files (the "Software"), to deal in the Software without
508 + * restriction, including without limitation the rights to use
509 + * copy, modify, merge, publish, distribute, sublicense, and/or
510 + * sell copies of the Software, and to permit persons to whom the
511 + * Software is furnished to do so, subject to the following
514 + * The above copyright notice and this permission notice shall be
515 + * included in all copies or substantial portions of the Software.
517 + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
518 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
519 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
520 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
521 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
522 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
523 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
524 + * OTHER DEALINGS IN THE SOFTWARE.
533 + pinctrl-0 = <µsom_sdhci_pins>;
534 + pinctrl-names = "default";