1 #include <linux/irqdomain.h>
4 #include <linux/of_address.h>
5 #include <linux/of_irq.h>
6 #include <linux/irqchip/chained_irq.h>
12 struct rps_chip_data
{
15 struct irq_domain
*domain
;
30 * Routines to acknowledge, disable and enable interrupts
32 static void rps_mask_irq(struct irq_data
*d
)
34 struct rps_chip_data
*chip_data
= irq_data_get_irq_chip_data(d
);
35 u32 mask
= BIT(d
->hwirq
);
37 iowrite32(mask
, chip_data
->base
+ RPS_MASK
);
40 static void rps_unmask_irq(struct irq_data
*d
)
42 struct rps_chip_data
*chip_data
= irq_data_get_irq_chip_data(d
);
43 u32 mask
= BIT(d
->hwirq
);
45 iowrite32(mask
, chip_data
->base
+ RPS_UNMASK
);
48 static struct irq_chip rps_chip
= {
50 .irq_mask
= rps_mask_irq
,
51 .irq_unmask
= rps_unmask_irq
,
54 static int rps_irq_domain_xlate(struct irq_domain
*d
,
55 struct device_node
*controller
,
56 const u32
*intspec
, unsigned int intsize
,
57 unsigned long *out_hwirq
,
58 unsigned int *out_type
)
60 if (d
->of_node
!= controller
)
65 *out_hwirq
= intspec
[0];
66 /* Honestly I do not know the type */
67 *out_type
= IRQ_TYPE_LEVEL_HIGH
;
72 static int rps_irq_domain_map(struct irq_domain
*d
, unsigned int irq
,
75 irq_set_chip_and_handler(irq
, &rps_chip
, handle_level_irq
);
76 set_irq_flags(irq
, IRQF_VALID
| IRQF_PROBE
);
77 irq_set_chip_data(irq
, d
->host_data
);
81 const struct irq_domain_ops rps_irq_domain_ops
= {
82 .map
= rps_irq_domain_map
,
83 .xlate
= rps_irq_domain_xlate
,
86 static void rps_handle_cascade_irq(unsigned int irq
, struct irq_desc
*desc
)
88 struct rps_chip_data
*chip_data
= irq_get_handler_data(irq
);
89 struct irq_chip
*chip
= irq_get_chip(irq
);
90 unsigned int cascade_irq
, rps_irq
;
93 chained_irq_enter(chip
, desc
);
95 status
= ioread32(chip_data
->base
+ RPS_STATUS
);
96 rps_irq
= __ffs(status
);
97 cascade_irq
= irq_find_mapping(chip_data
->domain
, rps_irq
);
99 if (unlikely(rps_irq
>= RPS_IRQ_COUNT
))
100 handle_bad_irq(cascade_irq
, desc
);
102 generic_handle_irq(cascade_irq
);
104 chained_irq_exit(chip
, desc
);
108 int __init
rps_of_init(struct device_node
*node
, struct device_node
*parent
)
110 void __iomem
*rps_base
;
111 int irq_start
= RPS_IRQ_BASE
;
118 rps_base
= of_iomap(node
, 0);
119 WARN(!rps_base
, "unable to map rps registers\n");
120 rps_data
.base
= rps_base
;
122 irq_base
= irq_alloc_descs(irq_start
, 0, RPS_IRQ_COUNT
, numa_node_id());
123 if (IS_ERR_VALUE(irq_base
)) {
124 WARN(1, "Cannot allocate irq_descs @ IRQ%d, assuming pre-allocated\n",
126 irq_base
= irq_start
;
129 rps_data
.domain
= irq_domain_add_legacy(node
, RPS_IRQ_COUNT
, irq_base
,
130 PRS_HWIRQ_BASE
, &rps_irq_domain_ops
, &rps_data
);
132 if (WARN_ON(!rps_data
.domain
))
136 irq
= irq_of_parse_and_map(node
, 0);
137 if (irq_set_handler_data(irq
, &rps_data
) != 0)
139 irq_set_chained_handler(irq
, rps_handle_cascade_irq
);
145 IRQCHIP_DECLARE(nas782x
, "plxtech,nas782x-rps", rps_of_init
);