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[openwrt/openwrt.git] / target / linux / ppc40x / patches-2.6.30 / 006-magicboxv2.patch
1 --- /dev/null
2 +++ b/arch/powerpc/boot/cuboot-magicboxv2.c
3 @@ -0,0 +1,70 @@
4 +/*
5 + * Old U-boot compatibility for Magicbox v2
6 + *
7 + * Author: Imre Kaloz <kaloz@openwrt.org>
8 + * Gabor Juhos <juhosg@openwrt.org>
9 + *
10 + * This program is free software; you can redistribute it and/or modify it
11 + * under the terms of the GNU General Public License version 2 as published
12 + * by the Free Software Foundation.
13 + */
14 +
15 +#include "ops.h"
16 +#include "io.h"
17 +#include "dcr.h"
18 +#include "stdio.h"
19 +#include "4xx.h"
20 +#include "44x.h"
21 +#include "cuboot.h"
22 +
23 +#define TARGET_4xx
24 +#define TARGET_405EP
25 +#include "ppcboot.h"
26 +
27 +static bd_t bd;
28 +
29 +static void fixup_cf_card(void)
30 +{
31 +#define DCRN_CPC0_PCI_BASE 0xf9
32 +#define CF_CS0_BASE 0xff100000
33 +#define CF_CS1_BASE 0xff200000
34 +
35 + /* Turn on PerWE instead of PCIsomething */
36 + mtdcr(DCRN_CPC0_PCI_BASE,
37 + mfdcr(DCRN_CPC0_PCI_BASE) | (0x80000000L >> 27));
38 +
39 + /* PerCS1 (CF's CS0): base 0xff100000, 16-bit, rw */
40 + mtdcr(DCRN_EBC0_CFGADDR, EBC_B1CR);
41 + mtdcr(DCRN_EBC0_CFGDATA, CF_CS0_BASE | EBC_BXCR_BU_RW | EBC_BXCR_BW_16);
42 + mtdcr(DCRN_EBC0_CFGADDR, EBC_B1AP);
43 + mtdcr(DCRN_EBC0_CFGDATA, 0x080bd800);
44 +
45 + /* PerCS2 (CF's CS1): base 0xff200000, 16-bit, rw */
46 + mtdcr(DCRN_EBC0_CFGADDR, EBC_B2CR);
47 + mtdcr(DCRN_EBC0_CFGDATA, CF_CS1_BASE | EBC_BXCR_BU_RW | EBC_BXCR_BW_16);
48 + mtdcr(DCRN_EBC0_CFGADDR, EBC_B2AP);
49 + mtdcr(DCRN_EBC0_CFGDATA, 0x080bd800);
50 +
51 +#undef DCRN_CPC0_PCI_BASE
52 +#undef CF_CS0_BASE
53 +#undef CF_CS1_BASE
54 +}
55 +
56 +static void magicboxv2_fixups(void)
57 +{
58 + fixup_cf_card();
59 + ibm405ep_fixup_clocks(25000000);
60 + ibm4xx_sdram_fixup_memsize();
61 + dt_fixup_mac_addresses(&bd.bi_enetaddr, &bd.bi_enet1addr);
62 +}
63 +
64 +void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
65 + unsigned long r6, unsigned long r7)
66 +{
67 + CUBOOT_INIT();
68 + platform_ops.fixups = magicboxv2_fixups;
69 + platform_ops.exit = ibm40x_dbcr_reset;
70 + fdt_init(_dtb_start);
71 + serial_console_init();
72 +}
73 +
74 --- /dev/null
75 +++ b/arch/powerpc/boot/dts/magicboxv2.dts
76 @@ -0,0 +1,281 @@
77 +/*
78 + * Device Tree Source for Magicbox v2
79 + *
80 + * Copyright 2008 Imre Kaloz <kaloz@openwrt.org>
81 + * Copyright 2009 Gabor Juhos <juhosg@openwrt.org>
82 + *
83 + * Based on walnut.dts
84 + *
85 + * This file is licensed under the terms of the GNU General Public
86 + * License version 2. This program is licensed "as is" without
87 + * any warranty of any kind, whether express or implied.
88 + */
89 +
90 +/dts-v1/;
91 +
92 +/ {
93 + #address-cells = <1>;
94 + #size-cells = <1>;
95 + model = "magicboxv2";
96 + compatible = "magicboxv2";
97 + dcr-parent = <&{/cpus/cpu@0}>;
98 +
99 + aliases {
100 + ethernet0 = &EMAC0;
101 + ethernet1 = &EMAC1;
102 + serial0 = &UART0;
103 + serial1 = &UART1;
104 + };
105 +
106 + cpus {
107 + #address-cells = <1>;
108 + #size-cells = <0>;
109 +
110 + cpu@0 {
111 + device_type = "cpu";
112 + model = "PowerPC,405EP";
113 + reg = <0x00000000>;
114 + clock-frequency = <0xbebc200>; /* Filled in by zImage */
115 + timebase-frequency = <0>; /* Filled in by zImage */
116 + i-cache-line-size = <20>;
117 + d-cache-line-size = <20>;
118 + i-cache-size = <4000>;
119 + d-cache-size = <4000>;
120 + dcr-controller;
121 + dcr-access-method = "native";
122 + };
123 + };
124 +
125 + memory {
126 + device_type = "memory";
127 + reg = <0x00000000 0x00000000>; /* Filled in by zImage */
128 + };
129 +
130 + UIC0: interrupt-controller {
131 + compatible = "ibm,uic";
132 + interrupt-controller;
133 + cell-index = <0>;
134 + dcr-reg = <0x0c0 0x009>;
135 + #address-cells = <0>;
136 + #size-cells = <0>;
137 + #interrupt-cells = <2>;
138 + };
139 +
140 + plb {
141 + compatible = "ibm,plb3";
142 + #address-cells = <1>;
143 + #size-cells = <1>;
144 + ranges;
145 + clock-frequency = <0>; /* Filled in by zImage */
146 +
147 + SDRAM0: memory-controller {
148 + compatible = "ibm,sdram-405ep";
149 + dcr-reg = <0x010 0x002>;
150 + };
151 +
152 + MAL: mcmal {
153 + compatible = "ibm,mcmal-405ep", "ibm,mcmal";
154 + dcr-reg = <0x180 0x062>;
155 + num-tx-chans = <4>;
156 + num-rx-chans = <2>;
157 + interrupt-parent = <&UIC0>;
158 + interrupts = <
159 + 0xb 0x4 /* TXEOB */
160 + 0xc 0x4 /* RXEOB */
161 + 0xa 0x4 /* SERR */
162 + 0xd 0x4 /* TXDE */
163 + 0xe 0x4 /* RXDE */>;
164 + };
165 +
166 + POB0: opb {
167 + compatible = "ibm,opb-405ep", "ibm,opb";
168 + #address-cells = <1>;
169 + #size-cells = <1>;
170 + ranges = <0xef600000 0xef600000 0x00a00000>;
171 + dcr-reg = <0x0a0 0x005>;
172 + clock-frequency = <0>; /* Filled in by zImage */
173 +
174 + UART0: serial@ef600300 {
175 + device_type = "serial";
176 + compatible = "ns16550";
177 + reg = <0xef600300 0x00000008>;
178 + virtual-reg = <0xef600300>;
179 + clock-frequency = <0>; /* Filled in by zImage */
180 + current-speed = <115200>;
181 + interrupt-parent = <&UIC0>;
182 + interrupts = <0x0 0x4>;
183 + };
184 +
185 + UART1: serial@ef600400 {
186 + device_type = "serial";
187 + compatible = "ns16550";
188 + reg = <0xef600400 0x00000008>;
189 + virtual-reg = <0xef600400>;
190 + clock-frequency = <0>; /* Filled in by zImage */
191 + current-speed = <115200>;
192 + interrupt-parent = <&UIC0>;
193 + interrupts = <0x1 0x4>;
194 + };
195 +
196 + IIC: i2c@ef600500 {
197 + compatible = "ibm,iic-405ep", "ibm,iic";
198 + #address-cells = <1>;
199 + #size-cells = <0>;
200 + reg = <0xef600500 0x00000011>;
201 + interrupt-parent = <&UIC0>;
202 + interrupts = <0x2 0x4>;
203 +
204 + dtt@48 {
205 + compatible = "national,lm75";
206 + reg = <0x48>;
207 + };
208 +
209 + eeprom@50 {
210 + compatible = "at24,24c16";
211 + reg = <0x50>;
212 + };
213 + };
214 +
215 + GPIO0: gpio-controller@ef600700 {
216 + compatible = "ibm,ppc4xx-gpio";
217 + reg = <0xef600700 0x00000020>;
218 + #gpio-cells = <2>;
219 + gpio-controller;
220 + };
221 +
222 + EMAC0: ethernet@ef600800 {
223 + linux,network-index = <0x0>;
224 + device_type = "network";
225 + compatible = "ibm,emac-405ep", "ibm,emac";
226 + interrupt-parent = <&UIC0>;
227 + interrupts = <
228 + 0xf 0x4 /* Ethernet */
229 + 0x9 0x4 /* Ethernet Wake Up */>;
230 + local-mac-address = [000000000000]; /* Filled in by zImage */
231 + reg = <0xef600800 0x00000070>;
232 + mal-device = <&MAL>;
233 + mal-tx-channel = <0>;
234 + mal-rx-channel = <0>;
235 + cell-index = <0>;
236 + max-frame-size = <0x5dc>;
237 + rx-fifo-size = <0x1000>;
238 + tx-fifo-size = <0x800>;
239 + phy-mode = "mii";
240 + phy-map = <0x00000000>;
241 + };
242 +
243 + EMAC1: ethernet@ef600900 {
244 + linux,network-index = <0x1>;
245 + device_type = "network";
246 + compatible = "ibm,emac-405ep", "ibm,emac";
247 + interrupt-parent = <&UIC0>;
248 + interrupts = <
249 + 0x11 0x4 /* Ethernet */
250 + 0x09 0x4 /* Ethernet Wake Up */>;
251 + local-mac-address = [000000000000]; /* Filled in by zImage */
252 + reg = <0xef600900 0x00000070>;
253 + mal-device = <&MAL>;
254 + mal-tx-channel = <2>;
255 + mal-rx-channel = <1>;
256 + cell-index = <1>;
257 + max-frame-size = <0x5dc>;
258 + rx-fifo-size = <0x1000>;
259 + tx-fifo-size = <0x800>;
260 + mdio-device = <&EMAC0>;
261 + phy-mode = "mii";
262 + phy-map = <0x00000001>;
263 + };
264 +
265 + leds {
266 + compatible = "gpio-leds";
267 + user {
268 + label = "magicbox:red:user";
269 + gpios = <&GPIO0 2 1>;
270 + };
271 + };
272 + };
273 +
274 + EBC0: ebc {
275 + compatible = "ibm,ebc-405ep", "ibm,ebc";
276 + dcr-reg = <0x012 0x002>;
277 + #address-cells = <2>;
278 + #size-cells = <1>;
279 + /* The ranges property is supplied by the bootwrapper
280 + * and is based on the firmware's configuration of the
281 + * EBC bridge
282 + */
283 + clock-frequency = <0>; /* Filled in by zImage */
284 +
285 + cf_card@ff100000 {
286 + compatible = "magicbox-cf", "pata-magicbox-cf";
287 + reg = <0x00000000 0xff100000 0x00001000
288 + 0x00000000 0xff200000 0x00001000>;
289 + interrupt-parent = <&UIC0>;
290 + interrupts = <0x19 0x1 /* IRQ_TYPE_EDGE_RISING */ >;
291 + };
292 +
293 + nor_flash@ffc00000 {
294 + compatible = "cfi-flash";
295 + bank-width = <2>;
296 + reg = <0x00000000 0xffc00000 0x00400000>;
297 + #address-cells = <1>;
298 + #size-cells = <1>;
299 + partition@0 {
300 + label = "linux";
301 + reg = <0x0 0x120000>;
302 + };
303 + partition@120000 {
304 + label = "rootfs";
305 + reg = <0x120000 0x2a0000>;
306 + };
307 + partition@3c0000 {
308 + label = "u-boot";
309 + reg = <0x3c0000 0x30000>;
310 + read-only;
311 + };
312 + };
313 + };
314 +
315 + PCI0: pci@ec000000 {
316 + device_type = "pci";
317 + #interrupt-cells = <1>;
318 + #size-cells = <2>;
319 + #address-cells = <3>;
320 + compatible = "ibm,plb405ep-pci", "ibm,plb-pci";
321 + primary;
322 + reg = <0xeec00000 0x00000008 /* Config space access */
323 + 0xeed80000 0x00000004 /* IACK */
324 + 0xeed80000 0x00000004 /* Special cycle */
325 + 0xef480000 0x00000040>; /* Internal registers */
326 +
327 + /* Outbound ranges, one memory and one IO,
328 + * later cannot be changed. Chip supports a second
329 + * IO range but we don't use it for now
330 + */
331 + ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x20000000
332 + 0x01000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
333 +
334 + /* Inbound 2GB range starting at 0 */
335 + dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
336 +
337 + interrupt-map-mask = <0xf800 0x0 0x0 0x0>;
338 + interrupt-map = <
339 + /* IDSEL 1 */
340 + 0x800 0x0 0x0 0x0 &UIC0 0x1c 0x8
341 +
342 + /* IDSEL 2 */
343 + 0x1000 0x0 0x0 0x0 &UIC0 0x1d 0x8
344 +
345 + /* IDSEL 3 */
346 + 0x1800 0x0 0x0 0x0 &UIC0 0x1e 0x8
347 +
348 + /* IDSEL 4 */
349 + 0x2000 0x0 0x0 0x0 &UIC0 0x1f 0x8
350 + >;
351 + };
352 + };
353 +
354 + chosen {
355 + linux,stdout-path = "/plb/opb/serial@ef600300";
356 + };
357 +};
358 --- a/arch/powerpc/boot/Makefile
359 +++ b/arch/powerpc/boot/Makefile
360 @@ -75,7 +75,8 @@ src-plat := of.c cuboot-52xx.c cuboot-82
361 cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c \
362 cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \
363 virtex405-head.S virtex.c redboot-83xx.c cuboot-sam440ep.c \
364 - cuboot-acadia.c cuboot-amigaone.c cuboot-magicboxv1.c
365 + cuboot-acadia.c cuboot-amigaone.c cuboot-magicboxv1.c \
366 + cuboot-magicboxv2.c
367 src-boot := $(src-wlib) $(src-plat) empty.c
368
369 src-boot := $(addprefix $(obj)/, $(src-boot))
370 @@ -193,6 +194,7 @@ image-$(CONFIG_EP405) += dtbImage.ep40
371 image-$(CONFIG_WALNUT) += treeImage.walnut
372 image-$(CONFIG_ACADIA) += cuImage.acadia
373 image-$(CONFIG_MAGICBOXV1) += cuImage.magicboxv1
374 +image-$(CONFIG_MAGICBOXV2) += cuImage.magicboxv2
375
376 # Board ports in arch/powerpc/platform/44x/Kconfig
377 image-$(CONFIG_EBONY) += treeImage.ebony cuImage.ebony
378 --- a/arch/powerpc/platforms/40x/Kconfig
379 +++ b/arch/powerpc/platforms/40x/Kconfig
380 @@ -59,6 +59,16 @@ config MAGICBOXV1
381 help
382 This option enables support for the Magicbox v1 board.
383
384 +config MAGICBOXV2
385 + bool "Magicbox v2"
386 + depends on 40x
387 + default n
388 + select PPC40x_SIMPLE
389 + select 405EP
390 + select PCI
391 + help
392 + This option enables support for the Magicbox v2 board.
393 +
394 config MAKALU
395 bool "Makalu"
396 depends on 40x
397 --- a/arch/powerpc/platforms/40x/ppc40x_simple.c
398 +++ b/arch/powerpc/platforms/40x/ppc40x_simple.c
399 @@ -53,6 +53,7 @@ machine_device_initcall(ppc40x_simple, p
400 static char *board[] __initdata = {
401 "amcc,acadia",
402 "magicboxv1",
403 + "magicboxv2",
404 };
405
406 static int __init ppc40x_probe(void)
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