target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-301w.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2 /* Copyright (c) 2021, Dirk Buchwalder <buchwalder@posteo.de> */
   3
   4 /dts-v1/;
   5
   6 #include "ipq8074.dtsi"
   7 #include "ipq8074-hk-cpu.dtsi"
   8 #include "ipq8074-ess.dtsi"
   9 #include <dt-bindings/gpio/gpio.h>
  10 #include <dt-bindings/input/input.h>
  11 #include <dt-bindings/leds/common.h>
  12
  13 / {
  14         model = "QNAP 301w";
  15         compatible = "qnap,301w", "qcom,ipq8074";
  16
  17         aliases {
  18                 serial0 = &blsp1_uart5;
  19                 /*
  20                  * Aliases as required by u-boot
  21                  * to patch MAC addresses
  22                  */
  23                 led-boot = &led_system_red;
  24                 led-failsafe = &led_system_red;
  25                 led-running = &led_pwr_green;
  26                 led-upgrade = &led_system_red;
  27                 ethernet0 = &dp1;
  28                 ethernet1 = &dp2;
  29                 ethernet2 = &dp3;
  30                 ethernet3 = &dp4;
  31                 ethernet4 = &dp5;
  32                 ethernet5 = &dp6_syn;
  33                 label-mac-device = &dp1;
  34         };
  35
  36         chosen {
  37                 stdout-path = "serial0:115200n8";
  38         };
  39
  40         keys {
  41                 compatible = "gpio-keys";
  42                 pinctrl-0 = <&button_pins>;
  43                 pinctrl-names = "default";
  44
  45                 wps-button {
  46                         label = "wps";
  47                         gpios = <&tlmm 57 GPIO_ACTIVE_LOW>;
  48                         linux,code = <KEY_WPS_BUTTON>;
  49                 };
  50
  51                 reset-button {
  52                         label = "reset";
  53                         gpios = <&tlmm 67 GPIO_ACTIVE_LOW>;
  54                         linux,code = <KEY_RESTART>;
  55                 };
  56         };
  57
  58         leds {
  59                 compatible = "gpio-leds";
  60                 pinctrl-0 = <&leds_pins>;
  61                 pinctrl-names = "default";
  62
  63                 led_system_green: led-system-green {
  64                         gpios = <&tlmm 1 GPIO_ACTIVE_HIGH>;
  65                         color = <LED_COLOR_ID_GREEN>;
  66                 };
  67
  68                 led_system_red: led-system-red {
  69                         gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
  70                         color = <LED_COLOR_ID_RED>;
  71                 };
  72
  73                 led_pwr_green: led-pwr-green {
  74                         gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
  75                         color = <LED_COLOR_ID_GREEN>;
  76                 };
  77
  78                 led-wifi-green {
  79                         gpios = <&tlmm 42 GPIO_ACTIVE_HIGH>;
  80                         color = <LED_COLOR_ID_GREEN>;
  81                 };
  82
  83                 led-lan4-green {
  84                         gpios = <&tlmm 6 GPIO_ACTIVE_HIGH>;
  85                         color = <LED_COLOR_ID_GREEN>;
  86                 };
  87
  88                 led-lan4-amber {
  89                         gpios = <&tlmm 7 GPIO_ACTIVE_HIGH>;
  90                         color = <LED_COLOR_ID_AMBER>;
  91                 };
  92
  93                 led-lan3-green {
  94                         gpios = <&tlmm 8 GPIO_ACTIVE_HIGH>;
  95                         color = <LED_COLOR_ID_GREEN>;
  96                 };
  97
  98                 led-lan3-amber {
  99                         gpios = <&tlmm 11 GPIO_ACTIVE_HIGH>;
 100                         color = <LED_COLOR_ID_AMBER>;
 101                 };
 102
 103                 led-lan2-green {
 104                         gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
 105                         color = <LED_COLOR_ID_GREEN>;
 106                 };
 107
 108                 led-lan2-amber {
 109                         gpios = <&tlmm 13 GPIO_ACTIVE_HIGH>;
 110                         color = <LED_COLOR_ID_AMBER>;
 111                 };
 112
 113                 led-lan1-green {
 114                         gpios = <&tlmm 14 GPIO_ACTIVE_HIGH>;
 115                         color = <LED_COLOR_ID_GREEN>;
 116                 };
 117
 118                 led-lan1-amber {
 119                         gpios = <&tlmm 15 GPIO_ACTIVE_HIGH>;
 120                         color = <LED_COLOR_ID_AMBER>;
 121                 };
 122
 123                 led-10g-1-green {
 124                         gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
 125                         color = <LED_COLOR_ID_GREEN>;
 126                 };
 127
 128                 led-10g-1-amber {
 129                         gpios = <&tlmm 56 GPIO_ACTIVE_HIGH>;
 130                         color = <LED_COLOR_ID_AMBER>;
 131                 };
 132
 133                 led-10g-2-green {
 134                         gpios = <&tlmm 51 GPIO_ACTIVE_HIGH>;
 135                         color = <LED_COLOR_ID_GREEN>;
 136                 };
 137
 138                 led-10g-2-amber {
 139                         gpios = <&tlmm 52 GPIO_ACTIVE_HIGH>;
 140                         color = <LED_COLOR_ID_AMBER>;
 141                 };
 142         };
 143 };
 144
 145 &tlmm {
 146
 147         mdio_pins: mdio-state {
 148                 mdc-pins {
 149                         pins = "gpio68";
 150                         function = "mdc";
 151                         drive-strength = <8>;
 152                         bias-pull-up;
 153                 };
 154
 155                 mdio-pins {
 156                         pins = "gpio69";
 157                         function = "mdio";
 158                         drive-strength = <8>;
 159                         bias-pull-up;
 160                 };
 161         };
 162
 163         button_pins: button-state {
 164                 wps-pins {
 165                         pins = "gpio57";
 166                         function = "gpio";
 167                         drive-strength = <8>;
 168                         bias-pull-up;
 169                 };
 170
 171                 rst-pins {
 172                         pins = "gpio67";
 173                         function = "gpio";
 174                         drive-strength = <8>;
 175                         bias-pull-up;
 176                 };
 177         };
 178
 179         leds_pins: leds-state {
 180                 pins = "gpio1", "gpio3", "gpio4", "gpio6", "gpio7", "gpio8",
 181                        "gpio11", "gpio12", "gpio13", "gpio14", "gpio15", "gpio42",
 182                        "gpio51", "gpio52", "gpio54", "gpio56";
 183                 function = "gpio";
 184                 drive-strength = <8>;
 185                 bias-pull-down;
 186         };
 187 };
 188
 189 &blsp1_uart5 {
 190         status = "okay";
 191 };
 192
 193 &prng {
 194         status = "okay";
 195 };
 196
 197 &ssphy_0 {
 198         status = "okay";
 199 };
 200
 201 &qusb_phy_0 {
 202         status = "okay";
 203 };
 204
 205 &ssphy_1 {
 206         status = "okay";
 207 };
 208
 209 &qusb_phy_1 {
 210         status = "okay";
 211 };
 212
 213 &usb_0 {
 214         status = "okay";
 215 };
 216
 217 &usb_1 {
 218         status = "okay";
 219 };
 220
 221 &cryptobam {
 222         status = "okay";
 223 };
 224
 225 &crypto {
 226         status = "okay";
 227 };
 228
 229 &qpic_bam {
 230         status = "okay";
 231 };
 232
 233 &blsp1_spi1 { /* BLSP1 QUP1 */
 234         pinctrl-0 = <&spi_0_pins>;
 235         pinctrl-names = "default";
 236         cs-gpios = <0>;
 237         status = "okay";
 238
 239         flash@0 {
 240                 #address-cells = <1>;
 241                 #size-cells = <1>;
 242                 reg = <0>;
 243                 compatible = "jedec,spi-nor";
 244                 spi-max-frequency = <50000000>;
 245
 246                 partitions {
 247                         compatible = "fixed-partitions";
 248                         #address-cells = <1>;
 249                         #size-cells = <1>;
 250
 251                         partition@0 {
 252                                 label = "0:sbl1";
 253                                 reg = <0x0 0x50000>;
 254                                 read-only;
 255                         };
 256
 257                         partition@50000 {
 258                                 label = "0:mibib";
 259                                 reg = <0x50000 0x10000>;
 260                                 read-only;
 261                         };
 262
 263                         partition@60000 {
 264                                 label = "0:qsee";
 265                                 reg = <0x60000 0x180000>;
 266                                 read-only;
 267                         };
 268
 269                         partition@1e0000 {
 270                                 label = "0:devcfg";
 271                                 reg = <0x1e0000 0x10000>;
 272                                 read-only;
 273                         };
 274
 275                         partition@1f0000 {
 276                                 label = "0:apdp";
 277                                 reg = <0x1f0000 0x10000>;
 278                                 read-only;
 279                         };
 280
 281                         partition@200000 {
 282                                 label = "0:rpm";
 283                                 reg = <0x200000 0x40000>;
 284                                 read-only;
 285                         };
 286
 287                         partition@240000 {
 288                                 label = "0:cdt";
 289                                 reg = <0x240000 0x10000>;
 290                                 read-only;
 291                         };
 292
 293                         partition@250000 {
 294                                 label = "0:appsblenv";
 295                                 reg = <0x250000 0x20000>;
 296                         };
 297
 298                         partition@270000 {
 299                                 label = "0:appsbl";
 300                                 reg = <0x250000 0x100000>;
 301                                 read-only;
 302                         };
 303
 304                         partition@370000 {
 305                                 label = "0:art";
 306                                 reg = <0x370000 0x40000>;
 307                                 read-only;
 308                         };
 309
 310                         partition@3b0000 {
 311                                 label = "0:ethphyfw1";
 312                                 reg = <0x3b0000 0x80000>;
 313
 314                                 compatible = "nvmem-cells";
 315                                 #address-cells = <1>;
 316                                 #size-cells = <1>;
 317
 318                                 aqr0_fw: firmware@0 {
 319                                         reg = <0x0 0x5fc02>;
 320                                 };
 321                         };
 322
 323                         partition@430000 {
 324                                 label = "0:ethphyfw2";
 325                                 reg = <0x430000 0x80000>;
 326
 327                                 compatible = "nvmem-cells";
 328                                 #address-cells = <1>;
 329                                 #size-cells = <1>;
 330
 331                                 aqr1_fw: firmware@0 {
 332                                         reg = <0x0 0x5fc02>;
 333                                 };
 334                         };
 335
 336                         partition@4b0000 {
 337                                 label = "reserved";
 338                                 reg = <0x4b0000 0x350000>;
 339                         };
 340                 };
 341         };
 342 };
 343
 344 &mdio {
 345         status = "okay";
 346
 347         pinctrl-0 = <&mdio_pins>;
 348         pinctrl-names = "default";
 349         reset-gpios = <&tlmm 37 GPIO_ACTIVE_LOW>;
 350
 351         aqr113c_0: ethernet-phy@0 {
 352                 compatible ="ethernet-phy-ieee802.3-c45";
 353                 reg = <0>;
 354                 reset-gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
 355                 firmware-name = "marvell/AQR-G4_v5.4.C-AQR_CIG_WF-1945_0x0_ID44778_VER1630.cld";
 356                 nvmem-cell-names = "firmware";
 357                 nvmem-cells = <&aqr0_fw>;
 358         };
 359
 360         aqr113c_8: ethernet-phy@8 {
 361                 compatible ="ethernet-phy-ieee802.3-c45";
 362                 reg = <8>;
 363                 reset-gpios = <&tlmm 59 GPIO_ACTIVE_LOW>;
 364                 firmware-name = "marvell/AQR-G4_v5.4.C-AQR_CIG_WF-1945_0x8_ID44776_VER1630.cld";
 365                 nvmem-cell-names = "firmware";
 366                 nvmem-cells = <&aqr1_fw>;
 367         };
 368
 369         qca8075_16: ethernet-phy@16 {
 370                 compatible = "ethernet-phy-ieee802.3-c22";
 371                 reg = <16>;
 372         };
 373
 374         qca8075_17: ethernet-phy@17 {
 375                 compatible = "ethernet-phy-ieee802.3-c22";
 376                 reg = <17>;
 377         };
 378
 379         qca8075_18: ethernet-phy@18 {
 380                 compatible = "ethernet-phy-ieee802.3-c22";
 381                 reg = <18>;
 382         };
 383
 384         qca8075_19: ethernet-phy@19 {
 385                 compatible = "ethernet-phy-ieee802.3-c22";
 386                 reg = <19>;
 387         };
 388 };
 389
 390 &sdhc_1 {
 391         status = "okay";
 392
 393         /* According to the stock dts from the QNAP gpl drop
 394          * the emmc has a problem with the hs400 > hs200 speed switch.
 395          * Therefore remove the mmc-hs400-1_8v property
 396         */
 397         /delete-property/ mmc-hs400-1_8v;
 398         mmc-hs200-1_8v;
 399         mmc-ddr-1_8v;
 400         vqmmc-supply = <&l11>;
 401 };
 402
 403 &switch {
 404         status = "okay";
 405
 406         switch_lan_bmp = <(ESS_PORT1 | ESS_PORT2 | ESS_PORT3 | ESS_PORT4 | ESS_PORT6)>; /* lan port bitmap */
 407         switch_wan_bmp = <ESS_PORT5>; /* wan port bitmap */
 408         malibu_first_phy_addr = <16>; /* PHY addr of the first malibu PHY */
 409         switch_mac_mode = <MAC_MODE_QSGMII>; /* mac mode for uniphy instance0*/
 410         switch_mac_mode1 = <MAC_MODE_USXGMII>; /* mac mode for uniphy instance1*/
 411         switch_mac_mode2 = <MAC_MODE_USXGMII>; /* mac mode for uniphy instance2*/
 412
 413         qcom,port_phyinfo {
 414                 port@0 {
 415                         port_id = <1>;
 416                         phy_address = <16>;
 417                 };
 418                 port@1 {
 419                         port_id = <2>;
 420                         phy_address = <17>;
 421                 };
 422                 port@2 {
 423                         port_id = <3>;
 424                         phy_address = <18>;
 425                 };
 426                 port@3 {
 427                         port_id = <4>;
 428                         phy_address = <19>;
 429                 };
 430                 port@4 {
 431                         port_id = <5>;
 432                         phy_address = <8>;
 433                         compatible = "ethernet-phy-ieee802.3-c45";
 434                         ethernet-phy-ieee802.3-c45;
 435                 };
 436                 port@5 {
 437                         port_id = <6>;
 438                         phy_address = <0>;
 439                         compatible = "ethernet-phy-ieee802.3-c45";
 440                         ethernet-phy-ieee802.3-c45;
 441                 };
 442         };
 443 };
 444
 445 &edma {
 446         status = "okay";
 447 };
 448
 449 &dp1 {
 450         status = "okay";
 451         phy-handle = <&qca8075_16>;
 452         label = "lan4";
 453 };
 454
 455 &dp2 {
 456         status = "okay";
 457         phy-handle = <&qca8075_17>;
 458         label = "lan3";
 459 };
 460
 461 &dp3 {
 462         status = "okay";
 463         phy-handle = <&qca8075_18>;
 464         label = "lan2";
 465 };
 466
 467 &dp4 {
 468         status = "okay";
 469         phy-handle = <&qca8075_19>;
 470         label = "lan1";
 471 };
 472
 473 &dp5 {
 474         status = "okay";
 475         qcom,mactype = <1>;
 476         phy-handle = <&aqr113c_8>;
 477         label = "10g-1";
 478 };
 479
 480 &dp6_syn {
 481         status = "okay";
 482         phy-handle = <&aqr113c_0>;
 483         label = "10g-2";
 484 };
 485
 486 &wifi {
 487         status = "okay";
 488
 489         qcom,ath11k-calibration-variant = "QNAP-301w";
 490 };