3 #include "mt7620a.dtsi"
6 compatible = "ralink,mt7620a-eval-board", "ralink,mt7620a-soc";
7 model = "Ralink MT7620a + MT7530 evaluation board";
14 compatible = "jedec,spi-nor";
16 spi-max-frequency = <10000000>;
19 compatible = "fixed-partitions";
31 reg = <0x30000 0x10000>;
35 factory: partition@40000 {
37 reg = <0x40000 0x10000>;
43 reg = <0x50000 0x7b0000>;
50 state_default: pinctrl0 {
52 ralink,group = "i2c", "uartf";
53 ralink,function = "gpio";
60 pinctrl-names = "default";
61 pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
62 mediatek,portmap = "llllw";
66 mediatek,fixed-link = <1000 1 1 1>;
73 phy0: ethernet-phy@0 {
78 phy1: ethernet-phy@1 {
83 phy2: ethernet-phy@2 {
88 phy3: ethernet-phy@3 {
93 phy4: ethernet-phy@4 {
98 phy1f: ethernet-phy@1f {
106 mediatek,port4 = "gmac";