3 #include "mt7620a.dtsi"
6 compatible = "ralink,mt7620a-eval-board", "ralink,mt7620a-soc";
7 model = "Ralink MT7620a + MT7530 evaluation board";
16 compatible = "jedec,spi-nor";
18 spi-max-frequency = <10000000>;
28 reg = <0x30000 0x10000>;
32 factory: partition@40000 {
34 reg = <0x40000 0x10000>;
40 reg = <0x50000 0x7b0000>;
46 state_default: pinctrl0 {
48 ralink,group = "i2c", "uartf";
49 ralink,function = "gpio";
56 pinctrl-names = "default";
57 pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
58 mediatek,portmap = "llllw";
62 mediatek,fixed-link = <1000 1 1 1>;
69 phy0: ethernet-phy@0 {
74 phy1: ethernet-phy@1 {
79 phy2: ethernet-phy@2 {
84 phy3: ethernet-phy@3 {
89 phy4: ethernet-phy@4 {
94 phy1f: ethernet-phy@1f {
102 mediatek,port4 = "gmac";
103 mediatek,mt7530 = <1>;