target/linux/ramips/dts/mt7620a_head-weblink_hdrm200.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "mt7620a.dtsi"
   4
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7
   8 / {
   9         compatible = "head-weblink,hdrm200", "ralink,mt7620a-soc";
  10         model = "Head Weblink HDRM200";
  11
  12         aliases {
  13                 led-boot = &led_system;
  14                 led-failsafe = &led_system;
  15                 led-running = &led_system;
  16                 led-upgrade = &led_system;
  17         };
  18
  19         chosen {
  20                 bootargs = "console=ttyS1,57600";
  21         };
  22
  23         leds {
  24                 compatible = "gpio-leds";
  25
  26                 rssi {
  27                         label = "red:rssi";
  28                         gpios = <&gpio0 19 GPIO_ACTIVE_LOW>;
  29                 };
  30
  31                 led_system: system {
  32                         label = "green:system";
  33                         gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
  34                 };
  35
  36                 air {
  37                         label = "green:wifi";
  38                         gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
  39                 };
  40         };
  41
  42         keys {
  43                 compatible = "gpio-keys";
  44
  45                 wps {
  46                         label = "wps";
  47                         gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
  48                         linux,code = <KEY_WPS_BUTTON>;
  49                 };
  50
  51                 reset {
  52                         label = "reset";
  53                         gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
  54                         linux,code = <KEY_RESTART>;
  55                 };
  56         };
  57 };
  58
  59 &spi0 {
  60         status = "okay";
  61
  62         flash@0 {
  63                 compatible = "jedec,spi-nor";
  64                 reg = <0>;
  65                 spi-max-frequency = <10000000>;
  66
  67                 partitions {
  68                         compatible = "fixed-partitions";
  69                         #address-cells = <1>;
  70                         #size-cells = <1>;
  71
  72                         partition@0 {
  73                                 label = "u-boot";
  74                                 reg = <0x0 0x30000>;
  75                                 read-only;
  76                         };
  77
  78                         partition@30000 {
  79                                 label = "u-boot-env";
  80                                 reg = <0x30000 0x10000>;
  81                                 read-only;
  82                         };
  83
  84                         factory: partition@40000 {
  85                                 label = "factory";
  86                                 reg = <0x40000 0x10000>;
  87                                 read-only;
  88                         };
  89
  90                         firmware: partition@50000 {
  91                                 compatible = "denx,uimage";
  92                                 label = "firmware";
  93                                 reg = <0x50000 0xfb0000>;
  94                         };
  95                 };
  96         };
  97 };
  98
  99 &gpio1 {
 100         status = "okay";
 101 };
 102
 103 &gpio3 {
 104         status = "okay";
 105 };
 106
 107 &sdhci {
 108         status = "okay";
 109 };
 110
 111 &ehci {
 112         status = "okay";
 113 };
 114
 115 &ohci {
 116         status = "okay";
 117 };
 118
 119 &ethernet {
 120         pinctrl-names = "default";
 121         pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
 122
 123         nvmem-cells = <&macaddr_factory_4>;
 124         nvmem-cell-names = "mac-address";
 125
 126         port@4 {
 127                 status = "okay";
 128                 phy-handle = <&phy4>;
 129                 phy-mode = "rgmii";
 130         };
 131
 132         port@5 {
 133                 status = "okay";
 134                 phy-handle = <&phy5>;
 135                 phy-mode = "rgmii";
 136         };
 137
 138         mdio-bus {
 139                 status = "okay";
 140
 141                 phy4: ethernet-phy@4 {
 142                         reg = <4>;
 143                         phy-mode = "rgmii";
 144                 };
 145
 146                 phy5: ethernet-phy@5 {
 147                         reg = <5>;
 148                         phy-mode = "rgmii";
 149                 };
 150         };
 151 };
 152
 153 &gsw {
 154         mediatek,port4-gmac;
 155         mediatek,ephy-base = /bits/ 8 <8>;
 156 };
 157
 158 &wmac {
 159         ralink,mtd-eeprom = <&factory 0x0>;
 160 };
 161
 162 &state_default {
 163         default {
 164                 groups = "i2c", "uartf", "pa", "spi refclk",
 165                                "wled";
 166                 function = "gpio";
 167         };
 168 };
 169
 170 &pcie {
 171         status = "okay";
 172 };
 173
 174 &pcie0 {
 175         wifi@0,0 {
 176                 compatible = "mediatek,mt76";
 177                 reg = <0x0000 0 0 0 0>;
 178                 mediatek,mtd-eeprom = <&factory 0x8000>;
 179                 ieee80211-freq-limit = <5000000 6000000>;
 180         };
 181 };
 182
 183 &uart {
 184         status = "okay";
 185 };
 186
 187 &factory {
 188         compatible = "nvmem-cells";
 189         #address-cells = <1>;
 190         #size-cells = <1>;
 191
 192         macaddr_factory_4: macaddr@4 {
 193                 reg = <0x4 0x6>;
 194         };
 195 };