target/linux/ramips/dts/mt7620a_planex_db-wrt01.dts

   1 #include "mt7620a.dtsi"
   2
   3 #include <dt-bindings/gpio/gpio.h>
   4 #include <dt-bindings/input/input.h>
   5
   6 / {
   7         compatible = "planex,db-wrt01", "ralink,mt7620a-soc";
   8         model = "Planex DB-WRT01";
   9
  10         aliases {
  11                 led-boot = &led_power;
  12                 led-failsafe = &led_power;
  13                 led-running = &led_power;
  14                 led-upgrade = &led_power;
  15         };
  16
  17         leds {
  18                 compatible = "gpio-leds";
  19
  20                 led_power: power {
  21                         label = "orange:power";
  22                         gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
  23                 };
  24         };
  25
  26         keys {
  27                 compatible = "gpio-keys";
  28
  29                 s1 {
  30                         label = "wps";
  31                         gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
  32                         linux,code = <KEY_WPS_BUTTON>;
  33                 };
  34         };
  35 };
  36
  37 &gpio1 {
  38         status = "okay";
  39 };
  40
  41 &spi0 {
  42         status = "okay";
  43
  44         flash@0 {
  45                 compatible = "jedec,spi-nor";
  46                 reg = <0>;
  47                 spi-max-frequency = <10000000>;
  48
  49                 partitions {
  50                         compatible = "fixed-partitions";
  51                         #address-cells = <1>;
  52                         #size-cells = <1>;
  53
  54                         partition@0 {
  55                                 label = "u-boot";
  56                                 reg = <0x0 0x30000>;
  57                                 read-only;
  58                         };
  59
  60                         partition@30000 {
  61                                 label = "u-boot-env";
  62                                 reg = <0x30000 0x10000>;
  63                                 read-only;
  64                         };
  65
  66                         factory: partition@40000 {
  67                                 label = "factory";
  68                                 reg = <0x40000 0x10000>;
  69                                 read-only;
  70
  71                                 nvmem-layout {
  72                                         compatible = "fixed-layout";
  73                                         #address-cells = <1>;
  74                                         #size-cells = <1>;
  75
  76                                         eeprom_factory_0: eeprom@0 {
  77                                                         reg = <0x0 0x200>;
  78                                         };
  79
  80                                         macaddr_factory_4: macaddr@4 {
  81                                                 reg = <0x4 0x6>;
  82                                         };
  83                                 };
  84                         };
  85
  86                         partition@50000 {
  87                                 compatible = "denx,uimage";
  88                                 label = "firmware";
  89                                 reg = <0x50000 0x7b0000>;
  90                         };
  91                 };
  92         };
  93 };
  94
  95 &state_default {
  96         gpio {
  97                 groups = "i2c", "spi refclk", "rgmii1";
  98                 function = "gpio";
  99         };
 100 };
 101
 102 &ethernet {
 103         pinctrl-names = "default";
 104         pinctrl-0 = <&ephy_pins>;
 105
 106         nvmem-cells = <&macaddr_factory_4>;
 107         nvmem-cell-names = "mac-address";
 108
 109         mediatek,portmap = "llllw";
 110 };
 111
 112 &wmac {
 113         nvmem-cells = <&eeprom_factory_0>;
 114         nvmem-cell-names = "eeprom";
 115 };