1 #include "mt7620a.dtsi"
4 compatible = "ralink,mt7620a-mt7530-evb", "ralink,mt7620a-soc";
5 model = "Ralink MT7620a + MT7530 evaluation board";
12 compatible = "jedec,spi-nor";
14 spi-max-frequency = <10000000>;
17 compatible = "fixed-partitions";
29 reg = <0x30000 0x10000>;
35 reg = <0x40000 0x10000>;
40 compatible = "denx,uimage";
42 reg = <0x50000 0x7b0000>;
50 groups = "i2c", "uartf";
56 pinctrl-names = "default";
57 pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
59 mediatek,portmap = "llllw";
63 mediatek,fixed-link = <1000 1 1 1>;
70 phy0: ethernet-phy@0 {
75 phy1: ethernet-phy@1 {
80 phy2: ethernet-phy@2 {
85 phy3: ethernet-phy@3 {
90 phy4: ethernet-phy@4 {
95 phy1f: ethernet-phy@1f {
103 mediatek,ephy-base = /bits/ 8 <12>;