1 // SPDX-License-Identifier: GPL-2.0-or-later
3 #include "mt7620a.dtsi"
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
9 compatible = "wavlink,wl-wn579x3", "ralink,mt7620a-soc";
10 model = "Wavlink WL-WN579X3";
14 led-failsafe = &led_wps;
15 led-running = &led_wps;
16 led-upgrade = &led_wps;
20 compatible = "gpio-keys";
24 gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
25 linux,code = <KEY_RESTART>;
30 gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
31 linux,code = <KEY_WPS_BUTTON>;
36 gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
38 linux,input-type = <EV_SW>;
42 label = "mode_repeater";
43 gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
45 linux,input-type = <EV_SW>;
50 compatible = "gpio-leds";
54 gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
59 gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
64 gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
69 gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
72 /* These three form the signal wifi strength segments */
74 label = "blue:wifi_high";
75 gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
79 label = "blue:wifi_medium";
80 gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
84 label = "blue:wifi_low";
85 gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
102 compatible = "jedec,spi-nor";
104 spi-max-frequency = <50000000>;
107 compatible = "fixed-partitions";
108 #address-cells = <1>;
119 reg = <0x30000 0x10000>;
123 factory: partition@40000 {
125 reg = <0x40000 0x10000>;
129 compatible = "fixed-layout";
130 #address-cells = <1>;
133 eeprom_factory_0: eeprom@0 {
137 eeprom_factory_8000: eeprom@8000 {
138 reg = <0x8000 0x200>;
141 macaddr_factory_28: macaddr@28 {
148 compatible = "denx,uimage";
150 reg = <0x50000 0x790000>;
154 label = "board_data";
155 reg = <0x7e0000 0x10000>;
161 reg = <0x7f0000 0x10000>;
174 reg = <0x0000 0 0 0 0>;
175 nvmem-cells = <&eeprom_factory_8000>;
176 nvmem-cell-names = "eeprom";
177 ieee80211-freq-limit = <5000000 6000000>;
182 pinctrl-names = "default";
183 pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
185 nvmem-cells = <&macaddr_factory_28>;
186 nvmem-cell-names = "mac-address";
188 mediatek,portmap = "llllw";
192 phy-handle = <&phy4>;
198 phy-handle = <&phy5>;
205 phy4: ethernet-phy@4 {
210 phy5: ethernet-phy@5 {
219 mediatek,ephy-base = /bits/ 8 <8>;
223 nvmem-cells = <&eeprom_factory_0>;
224 nvmem-cell-names = "eeprom";
229 groups = "ephy", "i2c", "wled", "uartf";