target/linux/ramips/dts/mt7620n.dtsi

   1 /dts-v1/;
   2
   3 / {
   4         #address-cells = <1>;
   5         #size-cells = <1>;
   6         compatible = "ralink,mt7620n-soc";
   7
   8         aliases {
   9                 spi0 = &spi0;
  10                 spi1 = &spi1;
  11                 serial0 = &uartlite;
  12         };
  13
  14         cpus {
  15                 #address-cells = <1>;
  16                 #size-cells = <0>;
  17
  18                 cpu@0 {
  19                         compatible = "mips,mips24KEc";
  20                         reg = <0>;
  21                 };
  22         };
  23
  24         chosen {
  25                 bootargs = "console=ttyS0,57600";
  26         };
  27
  28         cpuintc: cpuintc {
  29                 #address-cells = <0>;
  30                 #interrupt-cells = <1>;
  31                 interrupt-controller;
  32                 compatible = "mti,cpu-interrupt-controller";
  33         };
  34
  35         palmbus: palmbus@10000000 {
  36                 compatible = "palmbus";
  37                 reg = <0x10000000 0x200000>;
  38                 ranges = <0x0 0x10000000 0x1FFFFF>;
  39
  40                 #address-cells = <1>;
  41                 #size-cells = <1>;
  42
  43                 sysc: syscon@0 {
  44                         compatible = "ralink,mt7620-sysc", "syscon";
  45                         reg = <0x0 0x100>;
  46                         #clock-cells = <1>;
  47                         #reset-cells = <1>;
  48                 };
  49
  50                 timer: timer@100 {
  51                         compatible = "ralink,mt7620a-timer", "ralink,rt2880-timer";
  52                         reg = <0x100 0x20>;
  53
  54                         clocks = <&sysc 5>;
  55
  56                         interrupt-parent = <&intc>;
  57                         interrupts = <1>;
  58                 };
  59
  60                 watchdog: watchdog@120 {
  61                         compatible = "ralink,mt7620a-wdt", "ralink,rt2880-wdt";
  62                         reg = <0x120 0x10>;
  63
  64                         clocks = <&sysc 6>;
  65
  66                         resets = <&sysc 8>;
  67                         reset-names = "wdt";
  68
  69                         interrupt-parent = <&intc>;
  70                         interrupts = <1>;
  71                 };
  72
  73                 intc: intc@200 {
  74                         compatible = "ralink,mt7620a-intc", "ralink,rt2880-intc";
  75                         reg = <0x200 0x100>;
  76
  77                         resets = <&sysc 19>;
  78                         reset-names = "intc";
  79
  80                         interrupt-controller;
  81                         #interrupt-cells = <1>;
  82
  83                         interrupt-parent = <&cpuintc>;
  84                         interrupts = <2>;
  85                 };
  86
  87                 memc: memc@300 {
  88                         compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
  89                         reg = <0x300 0x100>;
  90
  91                         resets = <&sysc 20>;
  92                         reset-names = "mc";
  93
  94                         interrupt-parent = <&intc>;
  95                         interrupts = <3>;
  96                 };
  97
  98                 gpio0: gpio@600 {
  99                         compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
 100                         reg = <0x600 0x34>;
 101
 102                         resets = <&sysc 13>;
 103                         reset-names = "pio";
 104
 105                         interrupt-parent = <&intc>;
 106                         interrupts = <6>;
 107
 108                         gpio-controller;
 109                         #gpio-cells = <2>;
 110
 111                         ngpios = <24>;
 112                         ralink,gpio-base = <0>;
 113                         ralink,register-map = [ 00 04 08 0c
 114                                                 20 24 28 2c
 115                                                 30 34 ];
 116                 };
 117
 118                 gpio1: gpio@638 {
 119                         compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
 120                         reg = <0x638 0x24>;
 121
 122                         interrupt-parent = <&intc>;
 123                         interrupts = <6>;
 124
 125                         gpio-controller;
 126                         #gpio-cells = <2>;
 127
 128                         ngpios = <16>;
 129                         ralink,gpio-base = <24>;
 130                         ralink,register-map = [ 00 04 08 0c
 131                                                 10 14 18 1c
 132                                                 20 24 ];
 133
 134                         status = "disabled";
 135                 };
 136
 137                 gpio2: gpio@660 {
 138                         compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
 139                         reg = <0x660 0x24>;
 140
 141                         interrupt-parent = <&intc>;
 142                         interrupts = <6>;
 143
 144                         gpio-controller;
 145                         #gpio-cells = <2>;
 146
 147                         ngpios = <32>;
 148                         ralink,gpio-base = <40>;
 149                         ralink,register-map = [ 00 04 08 0c
 150                                                 10 14 18 1c
 151                                                 20 24 ];
 152
 153                         status = "disabled";
 154                 };
 155
 156                 gpio3: gpio@688 {
 157                         compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
 158                         reg = <0x688 0x24>;
 159
 160                         interrupt-parent = <&intc>;
 161                         interrupts = <6>;
 162
 163                         gpio-controller;
 164                         #gpio-cells = <2>;
 165
 166                         ngpios = <1>;
 167                         ralink,gpio-base = <72>;
 168                         ralink,register-map = [ 00 04 08 0c
 169                                                 10 14 18 1c
 170                                                 20 24 ];
 171
 172                         status = "disabled";
 173                 };
 174
 175                 i2c: i2c@900 {
 176                         compatible = "ralink,rt2880-i2c";
 177                         reg = <0x900 0x100>;
 178
 179                         clocks = <&sysc 8>;
 180
 181                         resets = <&sysc 16>;
 182                         reset-names = "i2c";
 183
 184                         #address-cells = <1>;
 185                         #size-cells = <0>;
 186
 187                         status = "disabled";
 188
 189                         pinctrl-names = "default";
 190                         pinctrl-0 = <&i2c_pins>;
 191                 };
 192
 193                 spi0: spi@b00 {
 194                         compatible = "ralink,mt7620a-spi", "ralink,rt2880-spi";
 195                         reg = <0xb00 0x40>;
 196
 197                         clocks = <&sysc 10>;
 198
 199                         resets = <&sysc 18>;
 200                         reset-names = "spi";
 201
 202                         #address-cells = <1>;
 203                         #size-cells = <0>;
 204
 205                         status = "disabled";
 206
 207                         pinctrl-names = "default";
 208                         pinctrl-0 = <&spi_pins>;
 209                 };
 210
 211                 spi1: spi@b40 {
 212                         compatible = "ralink,rt2880-spi";
 213                         reg = <0xb40 0x60>;
 214
 215                         clocks = <&sysc 11>;
 216
 217                         resets = <&sysc 18>;
 218                         reset-names = "spi";
 219
 220                         #address-cells = <1>;
 221                         #size-cells = <0>;
 222
 223                         status = "disabled";
 224
 225                         pinctrl-names = "default";
 226                         pinctrl-0 = <&spi_cs1>;
 227                 };
 228
 229                 uartlite: uartlite@c00 {
 230                         compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
 231                         reg = <0xc00 0x100>;
 232
 233                         clocks = <&sysc 12>;
 234
 235                         resets = <&sysc 19>;
 236
 237                         interrupt-parent = <&intc>;
 238                         interrupts = <12>;
 239
 240                         reg-shift = <2>;
 241
 242                         pinctrl-names = "default";
 243                         pinctrl-0 = <&uartlite_pins>;
 244                 };
 245
 246                 systick: systick@d00 {
 247                         compatible = "ralink,mt7620a-systick", "ralink,cevt-systick";
 248                         reg = <0xd00 0x10>;
 249
 250                         resets = <&sysc 28>;
 251                         reset-names = "intc";
 252
 253                         interrupt-parent = <&cpuintc>;
 254                         interrupts = <7>;
 255                 };
 256         };
 257
 258         pinctrl: pinctrl {
 259                 compatible = "ralink,rt2880-pinmux";
 260                 pinctrl-names = "default";
 261                 pinctrl-0 = <&state_default>;
 262
 263                 state_default: pinctrl0 {
 264                 };
 265
 266                 ephy_pins: ephy {
 267                         ephy {
 268                                 groups = "ephy";
 269                                 function = "ephy";
 270                         };
 271                 };
 272
 273                 spi_pins: spi_pins {
 274                         spi_pins {
 275                                 groups = "spi";
 276                                 function = "spi";
 277                         };
 278                 };
 279
 280                 spi_cs1: spi1 {
 281                         spi1 {
 282                                 groups = "spi refclk";
 283                                 function = "spi refclk";
 284                         };
 285                 };
 286
 287                 i2c_pins: i2c_pins {
 288                         i2c_pins {
 289                                 groups = "i2c";
 290                                 function = "i2c";
 291                         };
 292                 };
 293
 294                 uartlite_pins: uartlite {
 295                         uart {
 296                                 groups = "uartlite";
 297                                 function = "uartlite";
 298                         };
 299                 };
 300         };
 301
 302         usbphy: usbphy {
 303                 compatible = "mediatek,mt7620-usbphy";
 304                 #phy-cells = <0>;
 305
 306                 ralink,sysctl = <&sysc>;
 307                 /* usb phy reset is only controled by RSTCTRL bit 25 */
 308                 resets = <&sysc 25>, <&sysc 22>;
 309                 reset-names = "host", "device";
 310         };
 311
 312         ethernet: ethernet@10100000 {
 313                 compatible = "mediatek,mt7620-eth";
 314                 reg = <0x10100000 0x10000>;
 315
 316                 #address-cells = <1>;
 317                 #size-cells = <0>;
 318
 319                 interrupt-parent = <&cpuintc>;
 320                 interrupts = <5>;
 321
 322                 resets = <&sysc 21>, <&sysc 23>;
 323                 reset-names = "fe", "esw";
 324
 325                 mediatek,switch = <&gsw>;
 326         };
 327
 328         gsw: gsw@10110000 {
 329                 compatible = "mediatek,mt7620-gsw";
 330                 reg = <0x10110000 0x8000>;
 331
 332                 resets = <&sysc 23>;
 333                 reset-names = "esw";
 334
 335                 interrupt-parent = <&intc>;
 336                 interrupts = <17>;
 337         };
 338
 339         ehci: ehci@101c0000 {
 340                 #address-cells = <1>;
 341                 #size-cells = <0>;
 342                 compatible = "generic-ehci";
 343                 reg = <0x101c0000 0x1000>;
 344
 345                 interrupt-parent = <&intc>;
 346                 interrupts = <18>;
 347
 348                 phys = <&usbphy>;
 349                 phy-names = "usb";
 350
 351                 status = "disabled";
 352
 353                 ehci_port1: port@1 {
 354                         reg = <1>;
 355                         #trigger-source-cells = <0>;
 356                 };
 357         };
 358
 359         ohci: ohci@101c1000 {
 360                 #address-cells = <1>;
 361                 #size-cells = <0>;
 362                 compatible = "generic-ohci";
 363                 reg = <0x101c1000 0x1000>;
 364
 365                 phys = <&usbphy>;
 366                 phy-names = "usb";
 367
 368                 interrupt-parent = <&intc>;
 369                 interrupts = <18>;
 370
 371                 status = "disabled";
 372
 373                 ohci_port1: port@1 {
 374                         reg = <1>;
 375                         #trigger-source-cells = <0>;
 376                 };
 377         };
 378
 379         wmac: wmac@10180000 {
 380                 compatible = "ralink,rt7620-wmac", "ralink,rt2880-wmac";
 381                 reg = <0x10180000 0x40000>;
 382
 383                 clocks = <&sysc 13>;
 384
 385                 interrupt-parent = <&cpuintc>;
 386                 interrupts = <6>;
 387
 388                 ralink,eeprom = "soc_wmac.eeprom";
 389         };
 390 };