1 #include <dt-bindings/interrupt-controller/mips-gic.h>
6 compatible = "mediatek,mtk7621-soc";
10 compatible = "mips,mips1004Kc";
14 compatible = "mips,mips1004Kc";
20 #interrupt-cells = <1>;
22 compatible = "mti,cpu-interrupt-controller";
26 compatible = "palmbus";
27 reg = <0x1E000000 0x100000>;
28 ranges = <0x0 0x1E000000 0x0FFFFF>;
34 compatible = "mtk,mt7621-sysc";
39 compatible = "mtk,mt7621-wdt";
47 compatible = "mtk,mt7621-gpio";
52 compatible = "mtk,mt7621-gpio-bank";
59 compatible = "mtk,mt7621-gpio-bank";
66 compatible = "mtk,mt7621-gpio-bank";
73 compatible = "mtk,mt7621-memc";
78 compatible = "mtk,mt7621-cpc";
79 reg = <0x1fbf0000 0x8000>;
83 compatible = "mtk,mt7621-mc";
84 reg = <0x1fbf8000 0x8000>;
88 compatible = "ns16550a";
91 /* FIXME: there should be way to detect this */
92 clock-frequency = <50000000>;
94 interrupt-parent = <&gic>;
95 interrupts = <GIC_SHARED 26 IRQ_TYPE_LEVEL_HIGH>;
105 compatible = "ralink,mt7621-spi";
108 /* FIXME: there should be way to detect this */
109 clock-frequency = <50000000>;
111 resets = <&rstctrl 18>;
114 #address-cells = <1>;
117 pinctrl-names = "default";
118 pinctrl-0 = <&spi_pins>;
121 #address-cells = <1>;
124 spi-max-frequency = <10000000>;
125 m25p,chunked-io = <32>;
131 compatible = "ralink,rt2880-pinmux";
132 pinctrl-names = "default";
133 pinctrl-0 = <&state_default>;
135 state_default: pinctrl0 {
140 ralink,group = "spi";
141 ralink,function = "spi";
147 ralink,group = "i2c";
148 ralink,function = "i2c";
154 ralink,group = "uart1";
155 ralink,function = "uart1";
161 ralink,group = "uart2";
162 ralink,function = "uart2";
168 ralink,group = "uart3";
169 ralink,function = "uart3";
173 rgmii1_pins: rgmii1 {
175 ralink,group = "rgmii1";
176 ralink,function = "rgmii1";
180 rgmii2_pins: rgmii2 {
182 ralink,group = "rgmii2";
183 ralink,function = "rgmii2";
189 ralink,group = "mdio";
190 ralink,function = "mdio";
196 ralink,group = "pcie";
197 ralink,function = "pcie rst";
203 ralink,group = "spi";
204 ralink,function = "nand1";
208 ralink,group = "sdhci";
209 ralink,function = "nand2";
215 ralink,group = "sdhci";
216 ralink,function = "sdhci";
222 compatible = "ralink,rt2880-reset";
227 compatible = "ralink,mt7620-sdhci";
228 reg = <0x1E130000 4000>;
230 interrupt-parent = <&gic>;
231 interrupts = <GIC_SHARED 20 IRQ_TYPE_LEVEL_HIGH>;
237 compatible = "xhci-platform";
238 reg = <0x1E1C0000 4000>;
240 interrupt-parent = <&gic>;
241 interrupts = <GIC_SHARED 22 IRQ_TYPE_LEVEL_HIGH>;
244 gic: interrupt-controller@1fbc0000 {
245 compatible = "mti,gic";
246 reg = <0x1fbc0000 0x2000>;
248 interrupt-controller;
249 #interrupt-cells = <3>;
251 mti,reserved-cpu-vectors = <7>;
254 compatible = "mti,gic-timer";
255 interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>;
257 /* FIXME: there should be way to detect this */
258 clock-frequency = <880000000>;
263 compatible = "mtk,mt7621-nand";
265 reg = <0x1e003000 0x800
267 #address-cells = <1>;
272 reg = <0x00000 0x80000>; /* 64 KB */
277 reg = <0x80000 0x80000>; /* 64 KB */
282 reg = <0x100000 0x40000>;
287 reg = <0x140000 0xec0000>;
292 compatible = "ralink,mt7621-eth";
293 reg = <0x1e100000 10000>;
295 #address-cells = <1>;
298 resets = <&rstctrl 6 &rstctrl 23>;
299 reset-names = "fe", "eth";
301 interrupt-parent = <&gic>;
302 interrupts = <GIC_SHARED 3 IRQ_TYPE_LEVEL_HIGH>;
305 #address-cells = <1>;
308 phy1f: ethernet-phy@1f {
316 compatible = "ralink,mt7620a-gsw";
317 reg = <0x1e110000 8000>;
318 interrupt-parent = <&gic>;
319 interrupts = <GIC_SHARED 23 IRQ_TYPE_LEVEL_HIGH>;
323 compatible = "mediatek,mt7621-pci";
324 reg = <0x1e140000 0x100
327 #address-cells = <3>;
330 pinctrl-names = "default";
331 pinctrl-0 = <&pcie_pins>;
337 0x02000000 0 0x00000000 0x60000000 0 0x10000000 /* pci memory */
338 0x01000000 0 0x00000000 0x1e160000 0 0x00010000 /* io space */
341 interrupt-parent = <&gic>;
342 interrupts = <GIC_SHARED 4 IRQ_TYPE_LEVEL_HIGH
343 GIC_SHARED 24 IRQ_TYPE_LEVEL_HIGH
344 GIC_SHARED 25 IRQ_TYPE_LEVEL_HIGH>;
349 reg = <0x0000 0 0 0 0>;
351 #address-cells = <3>;
358 reg = <0x0800 0 0 0 0>;
360 #address-cells = <3>;
367 reg = <0x1000 0 0 0 0>;
369 #address-cells = <3>;