target/linux/ramips/dts/mt7621_d-team_pbr-m1.dts

   1 #include "mt7621.dtsi"
   2
   3 #include <dt-bindings/gpio/gpio.h>
   4 #include <dt-bindings/input/input.h>
   5
   6 / {
   7         compatible = "d-team,pbr-m1", "mediatek,mt7621-soc";
   8         model = "PBR-M1";
   9
  10         aliases {
  11                 led-boot = &led_sys;
  12                 led-failsafe = &led_sys;
  13                 led-running = &led_sys;
  14                 led-upgrade = &led_sys;
  15         };
  16
  17         chosen {
  18                 bootargs = "console=ttyS0,115200";
  19         };
  20
  21         leds {
  22                 compatible = "gpio-leds";
  23
  24                 power {
  25                         label = "blue:power";
  26                         gpios = <&gpio 31 GPIO_ACTIVE_LOW>;
  27                         default-state = "on";
  28                 };
  29
  30                 led_sys: sys {
  31                         label = "blue:sys";
  32                         gpios = <&gpio 32 GPIO_ACTIVE_LOW>;
  33                 };
  34
  35                 internet {
  36                         label = "blue:internet";
  37                         gpios = <&gpio 29 GPIO_ACTIVE_LOW>;
  38                 };
  39
  40                 wlan2g {
  41                         label = "blue:wlan2g";
  42                         gpios = <&gpio 33 GPIO_ACTIVE_LOW>;
  43                 };
  44
  45                 wlan5g {
  46                         label = "blue:wlan5g";
  47                         gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
  48                 };
  49         };
  50
  51         keys {
  52                 compatible = "gpio-keys";
  53
  54                 reset {
  55                         label = "reset";
  56                         gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
  57                         linux,code = <KEY_RESTART>;
  58                 };
  59         };
  60
  61         gpio_export {
  62                 compatible = "gpio-export";
  63                 #size-cells = <0>;
  64
  65                 power_usb2 {
  66                         gpio-export,name = "power_usb2";
  67                         gpio-export,output = <1>;
  68                         gpios = <&gpio 22 GPIO_ACTIVE_HIGH>;
  69                 };
  70
  71                 power_usb3 {
  72                         gpio-export,name = "power_usb3";
  73                         gpio-export,output = <1>;
  74                         gpios = <&gpio 25 GPIO_ACTIVE_HIGH>;
  75                 };
  76
  77                 power_sata {
  78                         gpio-export,name = "power_sata";
  79                         gpio-export,output = <1>;
  80                         gpios = <&gpio 27 GPIO_ACTIVE_HIGH>;
  81                 };
  82         };
  83
  84         beeper: beeper {
  85                 compatible = "gpio-beeper";
  86                 gpios = <&gpio 26 GPIO_ACTIVE_LOW>;
  87         };
  88 };
  89
  90 &i2c {
  91         status = "okay";
  92
  93         rtc@51 {
  94                 status = "okay";
  95                 compatible = "nxp,pcf8563";
  96                 reg = <0x51>;
  97         };
  98 };
  99
 100 &sdhci {
 101         status = "okay";
 102 };
 103
 104 &spi0 {
 105         status = "okay";
 106
 107         flash@0 {
 108                 compatible = "jedec,spi-nor";
 109                 reg = <0>;
 110                 spi-max-frequency = <50000000>;
 111                 m25p,fast-read;
 112                 broken-flash-reset;
 113
 114                 partitions {
 115                         compatible = "fixed-partitions";
 116                         #address-cells = <1>;
 117                         #size-cells = <1>;
 118
 119                         partition@0 {
 120                                 label = "u-boot";
 121                                 reg = <0x0 0x30000>;
 122                                 read-only;
 123                         };
 124
 125                         partition@30000 {
 126                                 label = "u-boot-env";
 127                                 reg = <0x30000 0x10000>;
 128                                 read-only;
 129                         };
 130
 131                         factory: partition@40000 {
 132                                 compatible = "nvmem-cells";
 133                                 label = "factory";
 134                                 reg = <0x40000 0x10000>;
 135                                 #address-cells = <1>;
 136                                 #size-cells = <1>;
 137                                 read-only;
 138
 139                                 eeprom_factory_0: eeprom@0 {
 140                                         reg = <0x0 0x400>;
 141                                 };
 142
 143                                 eeprom_factory_8000: eeprom@8000 {
 144                                         reg = <0x8000 0x200>;
 145                                 };
 146
 147                                 macaddr_factory_e000: macaddr@e000 {
 148                                         reg = <0xe000 0x6>;
 149                                 };
 150
 151                                 macaddr_factory_e006: macaddr@e006 {
 152                                         reg = <0xe006 0x6>;
 153                                 };
 154                         };
 155
 156                         partition@50000 {
 157                                 compatible = "denx,uimage";
 158                                 label = "firmware";
 159                                 reg = <0x50000 0x1fb0000>;
 160                         };
 161                 };
 162         };
 163 };
 164
 165 &pinctrl {
 166         uart3_gpio: uart3-gpio {
 167                 uart3 {
 168                         groups = "uart3";
 169                         function = "gpio";
 170                 };
 171         };
 172 };
 173
 174 &pcie {
 175         status = "okay";
 176         pinctrl-0 = <&pcie_pins>, <&uart3_gpio>;
 177         reset-gpios = <&gpio 19 GPIO_ACTIVE_LOW>,
 178                       <&gpio 7 GPIO_ACTIVE_LOW>;
 179 };
 180
 181 &pcie0 {
 182         mt76@0,0 {
 183                 reg = <0x0000 0 0 0 0>;
 184                 nvmem-cells = <&eeprom_factory_8000>;
 185                 nvmem-cell-names = "eeprom";
 186                 ieee80211-freq-limit = <5000000 6000000>;
 187         };
 188 };
 189
 190 &pcie1 {
 191         mt76@0,0 {
 192                 reg = <0x0000 0 0 0 0>;
 193                 nvmem-cells = <&eeprom_factory_0>;
 194                 nvmem-cell-names = "eeprom";
 195         };
 196 };
 197
 198 &ethernet {
 199         pinctrl-0 = <&mdio_pins>, <&rgmii1_pins>;
 200 };
 201
 202 &gmac0 {
 203         nvmem-cells = <&macaddr_factory_e000>;
 204         nvmem-cell-names = "mac-address";
 205 };
 206
 207 &switch0 {
 208         ports {
 209                 port@0 {
 210                         status = "okay";
 211                         label = "lan1";
 212                 };
 213
 214                 port@1 {
 215                         status = "okay";
 216                         label = "lan2";
 217                 };
 218
 219                 port@2 {
 220                         status = "okay";
 221                         label = "lan3";
 222                 };
 223
 224                 port@3 {
 225                         status = "okay";
 226                         label = "lan4";
 227                 };
 228
 229                 port@4 {
 230                         status = "okay";
 231                         label = "wan";
 232                         nvmem-cells = <&macaddr_factory_e006>;
 233                         nvmem-cell-names = "mac-address";
 234                 };
 235         };
 236 };
 237
 238 &state_default {
 239         gpio {
 240                 groups = "wdt", "rgmii2", "jtag";
 241                 function = "gpio";
 242         };
 243 };