ramips: add support for SNR-CPE-ME2-SFP
[openwrt/openwrt.git] / target / linux / ramips / dts / mt7621_jcg_jhr-ac876m.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "mt7621.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 compatible = "jcg,jhr-ac876m", "mediatek,mt7621-soc";
10 model = "JCG JHR-AC876M";
11
12 aliases {
13 led-boot = &led_wps;
14 led-failsafe = &led_wps;
15 led-running = &led_wps;
16 led-upgrade = &led_wps;
17 label-mac-device = &gmac1;
18 };
19
20 leds {
21 compatible = "gpio-leds";
22
23 usb3 {
24 label = "blue:usb3";
25 gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
26 trigger-sources = <&xhci_ehci_port1>;
27 linux,default-trigger = "usbport";
28 };
29
30 usb2 {
31 label = "blue:usb2";
32 gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
33 trigger-sources = <&ehci_port2>;
34 linux,default-trigger = "usbport";
35 };
36
37 led_wps: wps {
38 label = "blue:wps";
39 gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
40 };
41 };
42
43 keys {
44 compatible = "gpio-keys";
45
46 reset {
47 label = "reset";
48 gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
49 linux,code = <KEY_RESTART>;
50 };
51
52 wps {
53 label = "wps";
54 gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
55 linux,code = <KEY_WPS_BUTTON>;
56 };
57 };
58 };
59
60 &spi0 {
61 status = "okay";
62
63 flash@0 {
64 compatible = "jedec,spi-nor";
65 reg = <0>;
66 spi-max-frequency = <80000000>;
67 m25p,fast-read;
68
69 partitions {
70 compatible = "fixed-partitions";
71 #address-cells = <1>;
72 #size-cells = <1>;
73
74 partition@0 {
75 label = "u-boot";
76 reg = <0x0 0x30000>;
77 read-only;
78 };
79
80 partition@30000 {
81 label = "u-boot-env";
82 reg = <0x30000 0x10000>;
83 read-only;
84 };
85
86 factory: partition@40000 {
87 label = "factory";
88 reg = <0x40000 0x10000>;
89 read-only;
90 };
91
92 partition@50000 {
93 compatible = "denx,uimage";
94 label = "firmware";
95 reg = <0x50000 0xfb0000>;
96 };
97 };
98 };
99 };
100
101 &pcie {
102 status = "okay";
103 };
104
105 &pcie0 {
106 wifi@0,0 {
107 compatible = "mediatek,mt76";
108 reg = <0x0000 0 0 0 0>;
109 mediatek,mtd-eeprom = <&factory 0x0>;
110 ieee80211-freq-limit = <2400000 2500000>;
111
112 led {
113 led-active-low;
114 };
115 };
116 };
117
118 &pcie1 {
119 wifi@0,0 {
120 compatible = "mediatek,mt76";
121 reg = <0x0000 0 0 0 0>;
122 mediatek,mtd-eeprom = <&factory 0x8000>;
123 ieee80211-freq-limit = <5000000 6000000>;
124
125 led {
126 led-active-low;
127 };
128 };
129 };
130
131 &gmac0 {
132 nvmem-cells = <&macaddr_factory_e000>;
133 nvmem-cell-names = "mac-address";
134 };
135
136 &gmac1 {
137 status = "okay";
138 label = "wan";
139 phy-handle = <&ethphy4>;
140
141 nvmem-cells = <&macaddr_factory_4>;
142 nvmem-cell-names = "mac-address";
143 };
144
145 &mdio {
146 ethphy4: ethernet-phy@4 {
147 reg = <4>;
148 };
149 };
150
151 &switch0 {
152 ports {
153 port@0 {
154 status = "okay";
155 label = "lan1";
156 };
157
158 port@1 {
159 status = "okay";
160 label = "lan2";
161 };
162
163 port@2 {
164 status = "okay";
165 label = "lan3";
166 };
167
168 port@3 {
169 status = "okay";
170 label = "lan4";
171 };
172 };
173 };
174
175 &state_default {
176 gpio {
177 groups = "i2c", "uart3", "jtag", "wdt";
178 function = "gpio";
179 };
180 };
181
182 &factory {
183 compatible = "nvmem-cells";
184 #address-cells = <1>;
185 #size-cells = <1>;
186
187 macaddr_factory_4: macaddr@4 {
188 reg = <0x4 0x6>;
189 };
190
191 macaddr_factory_e000: macaddr@e000 {
192 reg = <0xe000 0x6>;
193 };
194 };