3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/input/input.h>
8 label-mac-device = &gmac0;
12 compatible = "gpio-keys";
16 gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
17 linux,code = <KEY_RESTART>;
23 nvmem-cells = <&macaddr_factory_22 0>;
24 nvmem-cell-names = "mac-address";
38 nvmem-cells = <&macaddr_factory_22 1>;
39 nvmem-cell-names = "mac-address";
45 nvmem-cells = <&macaddr_factory_22 2>;
46 nvmem-cell-names = "mac-address";
52 nvmem-cells = <&macaddr_factory_22 3>;
53 nvmem-cell-names = "mac-address";
59 nvmem-cells = <&macaddr_factory_22 4>;
60 nvmem-cell-names = "mac-address";
69 compatible = "fixed-partitions";
81 reg = <0x80000 0x60000>;
85 factory: partition@e0000 {
86 compatible = "nvmem-cells";
88 reg = <0xe0000 0x60000>;
91 compatible = "fixed-layout";
95 macaddr_factory_22: macaddr@22 {
96 compatible = "mac-base";
98 #nvmem-cell-cells = <1>;
105 reg = <0x140000 0x300000>;
110 reg = <0x440000 0x300000>;
115 reg = <0x740000 0xf7c0000>;
122 groups = "uart2", "uart3", "pcie", "jtag";
129 * This board has 2Mb spi flash soldered in and visible
130 * from manufacturer's firmware.
131 * But this SoC shares spi and nand pins,
132 * and current driver doesn't handle this sharing well
137 compatible = "jedec,spi-nor";
139 spi-max-frequency = <10000000>;
142 compatible = "fixed-partitions";
143 #address-cells = <1>;
148 reg = <0x0 0x200000>;