6 compatible = "ralink,rt5350-soc";
19 compatible = "mips,mips24KEc";
25 bootargs = "console=ttyS0,57600";
30 #interrupt-cells = <1>;
32 compatible = "mti,cpu-interrupt-controller";
35 palmbus: palmbus@10000000 {
36 compatible = "palmbus";
37 reg = <0x10000000 0x200000>;
38 ranges = <0x0 0x10000000 0x1FFFFF>;
44 compatible = "ralink,rt5350-sysc", "ralink,rt3050-sysc", "syscon";
49 compatible = "ralink,rt5350-timer", "ralink,rt2880-timer";
52 interrupt-parent = <&intc>;
56 watchdog: watchdog@120 {
57 compatible = "ralink,rt5350-wdt", "ralink,rt2880-wdt";
60 resets = <&rstctrl 8>;
63 interrupt-parent = <&intc>;
68 compatible = "ralink,rt5350-intc", "ralink,rt2880-intc";
71 resets = <&rstctrl 19>;
75 #interrupt-cells = <1>;
77 interrupt-parent = <&cpuintc>;
82 compatible = "ralink,rt5350-memc", "ralink,rt3050-memc";
85 resets = <&rstctrl 20>;
88 interrupt-parent = <&intc>;
93 compatible = "ralink,rt5350-uart", "ralink,rt2880-uart", "ns16550a";
96 resets = <&rstctrl 12>;
99 interrupt-parent = <&intc>;
108 compatible = "ralink,rt5350-gpio", "ralink,rt2880-gpio";
111 resets = <&rstctrl 13>;
114 interrupt-parent = <&intc>;
121 ralink,gpio-base = <0>;
122 ralink,register-map = [ 00 04 08 0c
128 compatible = "ralink,rt5350-gpio", "ralink,rt2880-gpio";
131 interrupt-parent = <&intc>;
138 ralink,gpio-base = <22>;
139 ralink,register-map = [ 00 04 08 0c
147 compatible = "ralink,rt2880-i2c";
150 resets = <&rstctrl 16>;
153 #address-cells = <1>;
156 pinctrl-names = "default";
157 pinctrl-0 = <&i2c_pins>;
163 compatible = "ralink,rt3352-i2s";
166 resets = <&rstctrl 17>;
169 interrupt-parent = <&intc>;
177 dma-names = "tx", "rx";
183 compatible = "ralink,rt5350-spi", "ralink,rt2880-spi";
186 resets = <&rstctrl 18>;
189 #address-cells = <1>;
192 pinctrl-names = "default";
193 pinctrl-0 = <&spi_pins>;
199 compatible = "ralink,rt5350-spi", "ralink,rt2880-spi";
202 resets = <&rstctrl 18>;
205 #address-cells = <1>;
208 pinctrl-names = "default";
209 pinctrl-0 = <&spi_cs1>;
214 uartlite: uartlite@c00 {
215 compatible = "ralink,rt5350-uart", "ralink,rt2880-uart", "ns16550a";
218 resets = <&rstctrl 19>;
219 reset-names = "uartl";
221 interrupt-parent = <&intc>;
224 pinctrl-names = "default";
225 pinctrl-0 = <&uartlite_pins>;
230 systick: systick@d00 {
231 compatible = "ralink,rt5350-systick", "ralink,cevt-systick";
234 interrupt-parent = <&cpuintc>;
239 compatible = "ralink,rt5350-pcm";
240 reg = <0x2000 0x800>;
242 resets = <&rstctrl 11>;
245 interrupt-parent = <&intc>;
252 compatible = "ralink,rt3883-gdma";
253 reg = <0x2800 0x800>;
255 resets = <&rstctrl 14>;
258 interrupt-parent = <&intc>;
262 #dma-channels = <16>;
263 #dma-requests = <16>;
270 compatible = "ralink,rt2880-pinmux";
272 pinctrl-names = "default";
273 pinctrl-0 = <&state_default>;
275 state_default: pinctrl0 {
292 phy_led_pins: phy_led {
299 uartlite_pins: uartlite {
302 function = "uartlite";
316 function = "spi_cs1";
322 compatible = "ralink,rt5350-reset", "ralink,rt2880-reset";
327 compatible = "ralink,rt2880-clock";
332 compatible = "ralink,rt3352-usbphy";
335 ralink,sysctl = <&sysc>;
336 resets = <&rstctrl 22 &rstctrl 25>;
337 reset-names = "host", "device";
338 clocks = <&clkctrl 18>;
339 clock-names = "host";
342 ethernet: ethernet@10100000 {
343 compatible = "ralink,rt5350-eth";
344 reg = <0x10100000 0x10000>;
346 resets = <&rstctrl 21>;
349 interrupt-parent = <&cpuintc>;
352 mediatek,switch = <&esw>;
356 compatible = "ralink,rt5350-esw", "ralink,rt3050-esw";
357 reg = <0x10110000 0x8000>;
359 resets = <&rstctrl 23 &rstctrl 24>;
360 reset-names = "esw", "ephy";
362 interrupt-parent = <&intc>;
366 wmac: wmac@10180000 {
367 compatible = "ralink,rt5350-wmac", "ralink,rt2880-wmac";
368 reg = <0x10180000 0x40000>;
370 interrupt-parent = <&cpuintc>;
373 ralink,eeprom = "soc_wmac.eeprom";
376 ehci: ehci@101c0000 {
377 #address-cells = <1>;
379 compatible = "generic-ehci";
380 reg = <0x101c0000 0x1000>;
385 interrupt-parent = <&intc>;
390 #trigger-source-cells = <0>;
394 ohci: ohci@101c1000 {
395 #address-cells = <1>;
397 compatible = "generic-ohci";
398 reg = <0x101c1000 0x1000>;
403 interrupt-parent = <&intc>;
408 #trigger-source-cells = <0>;