2 * This program is free software; you can redistribute it and/or
3 * modify it under the terms of the GNU General Public License
4 * as published by the Free Software Foundation; either version 2
5 * of the License, or (at your option) any later version.
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
12 * Copyright (C) 2013 John Crispin <blogic@openwrt.org>
13 * Copyright (C) 2016 Vitaly Chekryzhev <13hakta@gmail.com>
17 #include <linux/module.h>
18 #include <linux/init.h>
19 #include <linux/list.h>
20 #include <linux/if_ether.h>
21 #include <linux/skbuff.h>
22 #include <linux/netdevice.h>
23 #include <linux/netlink.h>
24 #include <linux/bitops.h>
25 #include <net/genetlink.h>
26 #include <linux/switch.h>
27 #include <linux/delay.h>
28 #include <linux/phy.h>
29 #include <linux/netdevice.h>
30 #include <linux/etherdevice.h>
31 #include <linux/lockdep.h>
32 #include <linux/workqueue.h>
33 #include <linux/of_device.h>
37 #define MT7530_CPU_PORT 6
38 #define MT7530_NUM_PORTS 8
39 #ifdef CONFIG_SOC_MT7621
40 #define MT7530_NUM_VLANS 4095
42 #define MT7530_NUM_VLANS 16
44 #define MT7530_MAX_VID 4095
45 #define MT7530_MIN_VID 0
47 #define MT7530_PORT_MIB_TXB_ID 2 /* TxGOC */
48 #define MT7530_PORT_MIB_RXB_ID 6 /* RxGOC */
50 #define MT7621_PORT_MIB_TXB_ID 18 /* TxByte */
51 #define MT7621_PORT_MIB_RXB_ID 37 /* RxByte */
54 #define REG_ESW_WT_MAC_MFC 0x10
56 #define REG_ESW_WT_MAC_MFC_MIRROR_ENABLE BIT(3)
57 #define REG_ESW_WT_MAC_MFC_MIRROR_DEST_MASK 0x07
59 #define REG_ESW_VLAN_VTCR 0x90
60 #define REG_ESW_VLAN_VAWD1 0x94
61 #define REG_ESW_VLAN_VAWD2 0x98
62 #define REG_ESW_VLAN_VTIM(x) (0x100 + 4 * ((x) / 2))
64 #define REG_ESW_VLAN_VAWD1_IVL_MAC BIT(30)
65 #define REG_ESW_VLAN_VAWD1_VTAG_EN BIT(28)
66 #define REG_ESW_VLAN_VAWD1_VALID BIT(0)
68 /* vlan egress mode */
76 #define REG_ESW_PORT_PCR(x) (0x2004 | ((x) << 8))
77 #define REG_ESW_PORT_PVC(x) (0x2010 | ((x) << 8))
78 #define REG_ESW_PORT_PPBV1(x) (0x2014 | ((x) << 8))
80 #define REG_ESW_PORT_PCR_MIRROR_SRC_RX_BIT BIT(8)
81 #define REG_ESW_PORT_PCR_MIRROR_SRC_TX_BIT BIT(9)
82 #define REG_ESW_PORT_PCR_MIRROR_SRC_RX_MASK 0x0100
83 #define REG_ESW_PORT_PCR_MIRROR_SRC_TX_MASK 0x0200
85 #define REG_HWTRAP 0x7804
87 #define MIB_DESC(_s , _o, _n) \
94 struct mt7xxx_mib_desc
{
100 static const struct mt7xxx_mib_desc mt7620_mibs
[] = {
101 MIB_DESC(1, MT7620_MIB_STATS_PPE_AC_BCNT0
, "PPE_AC_BCNT0"),
102 MIB_DESC(1, MT7620_MIB_STATS_PPE_AC_PCNT0
, "PPE_AC_PCNT0"),
103 MIB_DESC(1, MT7620_MIB_STATS_PPE_AC_BCNT63
, "PPE_AC_BCNT63"),
104 MIB_DESC(1, MT7620_MIB_STATS_PPE_AC_PCNT63
, "PPE_AC_PCNT63"),
105 MIB_DESC(1, MT7620_MIB_STATS_PPE_MTR_CNT0
, "PPE_MTR_CNT0"),
106 MIB_DESC(1, MT7620_MIB_STATS_PPE_MTR_CNT63
, "PPE_MTR_CNT63"),
107 MIB_DESC(1, MT7620_MIB_STATS_GDM1_TX_GBCNT
, "GDM1_TX_GBCNT"),
108 MIB_DESC(1, MT7620_MIB_STATS_GDM1_TX_GPCNT
, "GDM1_TX_GPCNT"),
109 MIB_DESC(1, MT7620_MIB_STATS_GDM1_TX_SKIPCNT
, "GDM1_TX_SKIPCNT"),
110 MIB_DESC(1, MT7620_MIB_STATS_GDM1_TX_COLCNT
, "GDM1_TX_COLCNT"),
111 MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_GBCNT1
, "GDM1_RX_GBCNT1"),
112 MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_GPCNT1
, "GDM1_RX_GPCNT1"),
113 MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_OERCNT
, "GDM1_RX_OERCNT"),
114 MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_FERCNT
, "GDM1_RX_FERCNT"),
115 MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_SERCNT
, "GDM1_RX_SERCNT"),
116 MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_LERCNT
, "GDM1_RX_LERCNT"),
117 MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_CERCNT
, "GDM1_RX_CERCNT"),
118 MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_FCCNT
, "GDM1_RX_FCCNT"),
119 MIB_DESC(1, MT7620_MIB_STATS_GDM2_TX_GBCNT
, "GDM2_TX_GBCNT"),
120 MIB_DESC(1, MT7620_MIB_STATS_GDM2_TX_GPCNT
, "GDM2_TX_GPCNT"),
121 MIB_DESC(1, MT7620_MIB_STATS_GDM2_TX_SKIPCNT
, "GDM2_TX_SKIPCNT"),
122 MIB_DESC(1, MT7620_MIB_STATS_GDM2_TX_COLCNT
, "GDM2_TX_COLCNT"),
123 MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_GBCNT
, "GDM2_RX_GBCNT"),
124 MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_GPCNT
, "GDM2_RX_GPCNT"),
125 MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_OERCNT
, "GDM2_RX_OERCNT"),
126 MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_FERCNT
, "GDM2_RX_FERCNT"),
127 MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_SERCNT
, "GDM2_RX_SERCNT"),
128 MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_LERCNT
, "GDM2_RX_LERCNT"),
129 MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_CERCNT
, "GDM2_RX_CERCNT"),
130 MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_FCCNT
, "GDM2_RX_FCCNT")
133 static const struct mt7xxx_mib_desc mt7620_port_mibs
[] = {
134 MIB_DESC(1, MT7620_MIB_STATS_PORT_TGPCN
, "TxGPC"),
135 MIB_DESC(1, MT7620_MIB_STATS_PORT_TBOCN
, "TxBOC"),
136 MIB_DESC(1, MT7620_MIB_STATS_PORT_TGOCN
, "TxGOC"),
137 MIB_DESC(1, MT7620_MIB_STATS_PORT_TEPCN
, "TxEPC"),
138 MIB_DESC(1, MT7620_MIB_STATS_PORT_RGPCN
, "RxGPC"),
139 MIB_DESC(1, MT7620_MIB_STATS_PORT_RBOCN
, "RxBOC"),
140 MIB_DESC(1, MT7620_MIB_STATS_PORT_RGOCN
, "RxGOC"),
141 MIB_DESC(1, MT7620_MIB_STATS_PORT_REPC1N
, "RxEPC1"),
142 MIB_DESC(1, MT7620_MIB_STATS_PORT_REPC2N
, "RxEPC2")
145 static const struct mt7xxx_mib_desc mt7621_mibs
[] = {
146 MIB_DESC(1, MT7621_STATS_TDPC
, "TxDrop"),
147 MIB_DESC(1, MT7621_STATS_TCRC
, "TxCRC"),
148 MIB_DESC(1, MT7621_STATS_TUPC
, "TxUni"),
149 MIB_DESC(1, MT7621_STATS_TMPC
, "TxMulti"),
150 MIB_DESC(1, MT7621_STATS_TBPC
, "TxBroad"),
151 MIB_DESC(1, MT7621_STATS_TCEC
, "TxCollision"),
152 MIB_DESC(1, MT7621_STATS_TSCEC
, "TxSingleCol"),
153 MIB_DESC(1, MT7621_STATS_TMCEC
, "TxMultiCol"),
154 MIB_DESC(1, MT7621_STATS_TDEC
, "TxDefer"),
155 MIB_DESC(1, MT7621_STATS_TLCEC
, "TxLateCol"),
156 MIB_DESC(1, MT7621_STATS_TXCEC
, "TxExcCol"),
157 MIB_DESC(1, MT7621_STATS_TPPC
, "TxPause"),
158 MIB_DESC(1, MT7621_STATS_TL64PC
, "Tx64Byte"),
159 MIB_DESC(1, MT7621_STATS_TL65PC
, "Tx65Byte"),
160 MIB_DESC(1, MT7621_STATS_TL128PC
, "Tx128Byte"),
161 MIB_DESC(1, MT7621_STATS_TL256PC
, "Tx256Byte"),
162 MIB_DESC(1, MT7621_STATS_TL512PC
, "Tx512Byte"),
163 MIB_DESC(1, MT7621_STATS_TL1024PC
, "Tx1024Byte"),
164 MIB_DESC(2, MT7621_STATS_TOC
, "TxByte"),
165 MIB_DESC(1, MT7621_STATS_RDPC
, "RxDrop"),
166 MIB_DESC(1, MT7621_STATS_RFPC
, "RxFiltered"),
167 MIB_DESC(1, MT7621_STATS_RUPC
, "RxUni"),
168 MIB_DESC(1, MT7621_STATS_RMPC
, "RxMulti"),
169 MIB_DESC(1, MT7621_STATS_RBPC
, "RxBroad"),
170 MIB_DESC(1, MT7621_STATS_RAEPC
, "RxAlignErr"),
171 MIB_DESC(1, MT7621_STATS_RCEPC
, "RxCRC"),
172 MIB_DESC(1, MT7621_STATS_RUSPC
, "RxUnderSize"),
173 MIB_DESC(1, MT7621_STATS_RFEPC
, "RxFragment"),
174 MIB_DESC(1, MT7621_STATS_ROSPC
, "RxOverSize"),
175 MIB_DESC(1, MT7621_STATS_RJEPC
, "RxJabber"),
176 MIB_DESC(1, MT7621_STATS_RPPC
, "RxPause"),
177 MIB_DESC(1, MT7621_STATS_RL64PC
, "Rx64Byte"),
178 MIB_DESC(1, MT7621_STATS_RL65PC
, "Rx65Byte"),
179 MIB_DESC(1, MT7621_STATS_RL128PC
, "Rx128Byte"),
180 MIB_DESC(1, MT7621_STATS_RL256PC
, "Rx256Byte"),
181 MIB_DESC(1, MT7621_STATS_RL512PC
, "Rx512Byte"),
182 MIB_DESC(1, MT7621_STATS_RL1024PC
, "Rx1024Byte"),
183 MIB_DESC(2, MT7621_STATS_ROC
, "RxByte"),
184 MIB_DESC(1, MT7621_STATS_RDPC_CTRL
, "RxCtrlDrop"),
185 MIB_DESC(1, MT7621_STATS_RDPC_ING
, "RxIngDrop"),
186 MIB_DESC(1, MT7621_STATS_RDPC_ARL
, "RxARLDrop")
190 /* Global attributes. */
191 MT7530_ATTR_ENABLE_VLAN
,
194 struct mt7530_port_entry
{
200 struct mt7530_vlan_entry
{
209 struct switch_dev swdev
;
212 bool global_vlan_enable
;
213 struct mt7530_vlan_entry vlan_entries
[MT7530_NUM_VLANS
];
214 struct mt7530_port_entry port_entries
[MT7530_NUM_PORTS
];
217 struct mt7530_mapping
{
219 u16 pvids
[MT7530_NUM_PORTS
];
220 u8 members
[MT7530_NUM_VLANS
];
221 u8 etags
[MT7530_NUM_VLANS
];
222 u16 vids
[MT7530_NUM_VLANS
];
223 } mt7530_defaults
[] = {
226 .pvids
= { 1, 1, 1, 1, 2, 1, 1 },
227 .members
= { 0, 0x6f, 0x50 },
228 .etags
= { 0, 0x40, 0x40 },
232 .pvids
= { 2, 1, 1, 1, 1, 1, 1 },
233 .members
= { 0, 0x7e, 0x41 },
234 .etags
= { 0, 0x40, 0x40 },
238 .pvids
= { 1, 2, 1, 1, 1, 1, 1 },
239 .members
= { 0, 0x7d, 0x42 },
240 .etags
= { 0, 0x40, 0x40 },
245 struct mt7530_mapping
*
246 mt7530_find_mapping(struct device_node
*np
)
251 if (of_property_read_string(np
, "mediatek,portmap", &map
))
254 for (i
= 0; i
< ARRAY_SIZE(mt7530_defaults
); i
++)
255 if (!strcmp(map
, mt7530_defaults
[i
].name
))
256 return &mt7530_defaults
[i
];
262 mt7530_apply_mapping(struct mt7530_priv
*mt7530
, struct mt7530_mapping
*map
)
266 for (i
= 0; i
< MT7530_NUM_PORTS
; i
++)
267 mt7530
->port_entries
[i
].pvid
= map
->pvids
[i
];
269 for (i
= 0; i
< MT7530_NUM_VLANS
; i
++) {
270 mt7530
->vlan_entries
[i
].member
= map
->members
[i
];
271 mt7530
->vlan_entries
[i
].etags
= map
->etags
[i
];
272 mt7530
->vlan_entries
[i
].vid
= map
->vids
[i
];
277 mt7530_reset_switch(struct switch_dev
*dev
)
279 struct mt7530_priv
*priv
= container_of(dev
, struct mt7530_priv
, swdev
);
282 memset(priv
->port_entries
, 0, sizeof(priv
->port_entries
));
283 memset(priv
->vlan_entries
, 0, sizeof(priv
->vlan_entries
));
285 /* set default vid of each vlan to the same number of vlan, so the vid
286 * won't need be set explicitly.
288 for (i
= 0; i
< MT7530_NUM_VLANS
; i
++) {
289 priv
->vlan_entries
[i
].vid
= i
;
296 mt7530_get_vlan_enable(struct switch_dev
*dev
,
297 const struct switch_attr
*attr
,
298 struct switch_val
*val
)
300 struct mt7530_priv
*priv
= container_of(dev
, struct mt7530_priv
, swdev
);
302 val
->value
.i
= priv
->global_vlan_enable
;
308 mt7530_set_vlan_enable(struct switch_dev
*dev
,
309 const struct switch_attr
*attr
,
310 struct switch_val
*val
)
312 struct mt7530_priv
*priv
= container_of(dev
, struct mt7530_priv
, swdev
);
314 priv
->global_vlan_enable
= val
->value
.i
!= 0;
320 mt7530_r32(struct mt7530_priv
*priv
, u32 reg
)
326 mdiobus_write(priv
->bus
, 0x1f, 0x1f, (reg
>> 6) & 0x3ff);
327 low
= mdiobus_read(priv
->bus
, 0x1f, (reg
>> 2) & 0xf);
328 high
= mdiobus_read(priv
->bus
, 0x1f, 0x10);
330 return (high
<< 16) | (low
& 0xffff);
333 val
= ioread32(priv
->base
+ reg
);
334 pr_debug("MT7530 MDIO Read [%04x]=%08x\n", reg
, val
);
340 mt7530_w32(struct mt7530_priv
*priv
, u32 reg
, u32 val
)
343 mdiobus_write(priv
->bus
, 0x1f, 0x1f, (reg
>> 6) & 0x3ff);
344 mdiobus_write(priv
->bus
, 0x1f, (reg
>> 2) & 0xf, val
& 0xffff);
345 mdiobus_write(priv
->bus
, 0x1f, 0x10, val
>> 16);
349 pr_debug("MT7530 MDIO Write[%04x]=%08x\n", reg
, val
);
350 iowrite32(val
, priv
->base
+ reg
);
354 mt7530_vtcr(struct mt7530_priv
*priv
, u32 cmd
, u32 val
)
358 mt7530_w32(priv
, REG_ESW_VLAN_VTCR
, BIT(31) | (cmd
<< 12) | val
);
360 for (i
= 0; i
< 20; i
++) {
361 u32 val
= mt7530_r32(priv
, REG_ESW_VLAN_VTCR
);
363 if ((val
& BIT(31)) == 0)
369 printk("mt7530: vtcr timeout\n");
373 mt7530_get_port_pvid(struct switch_dev
*dev
, int port
, int *val
)
375 struct mt7530_priv
*priv
= container_of(dev
, struct mt7530_priv
, swdev
);
377 if (port
>= MT7530_NUM_PORTS
)
380 *val
= mt7530_r32(priv
, REG_ESW_PORT_PPBV1(port
));
387 mt7530_set_port_pvid(struct switch_dev
*dev
, int port
, int pvid
)
389 struct mt7530_priv
*priv
= container_of(dev
, struct mt7530_priv
, swdev
);
391 if (port
>= MT7530_NUM_PORTS
)
394 if (pvid
< MT7530_MIN_VID
|| pvid
> MT7530_MAX_VID
)
397 priv
->port_entries
[port
].pvid
= pvid
;
403 mt7530_get_vlan_ports(struct switch_dev
*dev
, struct switch_val
*val
)
405 struct mt7530_priv
*priv
= container_of(dev
, struct mt7530_priv
, swdev
);
412 if (val
->port_vlan
< 0 || val
->port_vlan
>= MT7530_NUM_VLANS
)
415 mt7530_vtcr(priv
, 0, val
->port_vlan
);
417 member
= mt7530_r32(priv
, REG_ESW_VLAN_VAWD1
);
421 etags
= mt7530_r32(priv
, REG_ESW_VLAN_VAWD2
);
423 for (i
= 0; i
< MT7530_NUM_PORTS
; i
++) {
424 struct switch_port
*p
;
427 if (!(member
& BIT(i
)))
430 p
= &val
->value
.ports
[val
->len
++];
433 etag
= (etags
>> (i
* 2)) & 0x3;
435 if (etag
== ETAG_CTRL_TAG
)
436 p
->flags
|= BIT(SWITCH_PORT_FLAG_TAGGED
);
437 else if (etag
!= ETAG_CTRL_UNTAG
)
438 printk("vlan %d port %d egress tag control neither untag nor tag: %d.\n",
439 val
->port_vlan
, i
, etag
);
446 mt7530_set_vlan_ports(struct switch_dev
*dev
, struct switch_val
*val
)
448 struct mt7530_priv
*priv
= container_of(dev
, struct mt7530_priv
, swdev
);
453 if (val
->port_vlan
< 0 || val
->port_vlan
>= MT7530_NUM_VLANS
||
454 val
->len
> MT7530_NUM_PORTS
)
457 for (i
= 0; i
< val
->len
; i
++) {
458 struct switch_port
*p
= &val
->value
.ports
[i
];
460 if (p
->id
>= MT7530_NUM_PORTS
)
463 member
|= BIT(p
->id
);
465 if (p
->flags
& BIT(SWITCH_PORT_FLAG_TAGGED
))
468 priv
->vlan_entries
[val
->port_vlan
].member
= member
;
469 priv
->vlan_entries
[val
->port_vlan
].etags
= etags
;
475 mt7530_set_vid(struct switch_dev
*dev
, const struct switch_attr
*attr
,
476 struct switch_val
*val
)
478 struct mt7530_priv
*priv
= container_of(dev
, struct mt7530_priv
, swdev
);
482 vlan
= val
->port_vlan
;
483 vid
= (u16
)val
->value
.i
;
485 if (vlan
< 0 || vlan
>= MT7530_NUM_VLANS
)
488 if (vid
< MT7530_MIN_VID
|| vid
> MT7530_MAX_VID
)
491 priv
->vlan_entries
[vlan
].vid
= vid
;
496 mt7621_get_vid(struct switch_dev
*dev
, const struct switch_attr
*attr
,
497 struct switch_val
*val
)
499 val
->value
.i
= val
->port_vlan
;
504 mt7530_get_vid(struct switch_dev
*dev
, const struct switch_attr
*attr
,
505 struct switch_val
*val
)
507 struct mt7530_priv
*priv
= container_of(dev
, struct mt7530_priv
, swdev
);
511 vlan
= val
->port_vlan
;
513 vid
= mt7530_r32(priv
, REG_ESW_VLAN_VTIM(vlan
));
523 mt7530_get_mirror_monitor_port(struct switch_dev
*dev
, const struct switch_attr
*attr
,
524 struct switch_val
*val
)
526 struct mt7530_priv
*priv
= container_of(dev
, struct mt7530_priv
, swdev
);
528 val
->value
.i
= priv
->mirror_dest_port
;
534 mt7530_set_mirror_monitor_port(struct switch_dev
*dev
, const struct switch_attr
*attr
,
535 struct switch_val
*val
)
537 struct mt7530_priv
*priv
= container_of(dev
, struct mt7530_priv
, swdev
);
539 priv
->mirror_dest_port
= val
->value
.i
;
545 mt7530_get_port_mirror_rx(struct switch_dev
*dev
, const struct switch_attr
*attr
,
546 struct switch_val
*val
)
548 struct mt7530_priv
*priv
= container_of(dev
, struct mt7530_priv
, swdev
);
550 val
->value
.i
= priv
->port_entries
[val
->port_vlan
].mirror_rx
;
556 mt7530_set_port_mirror_rx(struct switch_dev
*dev
, const struct switch_attr
*attr
,
557 struct switch_val
*val
)
559 struct mt7530_priv
*priv
= container_of(dev
, struct mt7530_priv
, swdev
);
561 priv
->port_entries
[val
->port_vlan
].mirror_rx
= val
->value
.i
;
567 mt7530_get_port_mirror_tx(struct switch_dev
*dev
, const struct switch_attr
*attr
,
568 struct switch_val
*val
)
570 struct mt7530_priv
*priv
= container_of(dev
, struct mt7530_priv
, swdev
);
572 val
->value
.i
= priv
->port_entries
[val
->port_vlan
].mirror_tx
;
578 mt7530_set_port_mirror_tx(struct switch_dev
*dev
, const struct switch_attr
*attr
,
579 struct switch_val
*val
)
581 struct mt7530_priv
*priv
= container_of(dev
, struct mt7530_priv
, swdev
);
583 priv
->port_entries
[val
->port_vlan
].mirror_tx
= val
->value
.i
;
589 mt7530_write_vlan_entry(struct mt7530_priv
*priv
, int vlan
, u16 vid
,
595 #ifndef CONFIG_SOC_MT7621
597 val
= mt7530_r32(priv
, REG_ESW_VLAN_VTIM(vlan
));
605 mt7530_w32(priv
, REG_ESW_VLAN_VTIM(vlan
), val
);
608 /* vlan port membership */
610 mt7530_w32(priv
, REG_ESW_VLAN_VAWD1
, REG_ESW_VLAN_VAWD1_IVL_MAC
|
611 REG_ESW_VLAN_VAWD1_VTAG_EN
| (ports
<< 16) |
612 REG_ESW_VLAN_VAWD1_VALID
);
614 mt7530_w32(priv
, REG_ESW_VLAN_VAWD1
, 0);
618 for (port
= 0; port
< MT7530_NUM_PORTS
; port
++) {
619 if (etags
& BIT(port
))
620 val
|= ETAG_CTRL_TAG
<< (port
* 2);
622 val
|= ETAG_CTRL_UNTAG
<< (port
* 2);
624 mt7530_w32(priv
, REG_ESW_VLAN_VAWD2
, val
);
626 /* write to vlan table */
627 #ifdef CONFIG_SOC_MT7621
628 mt7530_vtcr(priv
, 1, vid
);
630 mt7530_vtcr(priv
, 1, vlan
);
635 mt7530_apply_config(struct switch_dev
*dev
)
637 struct mt7530_priv
*priv
= container_of(dev
, struct mt7530_priv
, swdev
);
641 bool is_mirror
= false;
643 if (!priv
->global_vlan_enable
) {
644 for (i
= 0; i
< MT7530_NUM_PORTS
; i
++)
645 mt7530_w32(priv
, REG_ESW_PORT_PCR(i
), 0x00400000);
647 mt7530_w32(priv
, REG_ESW_PORT_PCR(MT7530_CPU_PORT
), 0x00ff0000);
649 for (i
= 0; i
< MT7530_NUM_PORTS
; i
++)
650 mt7530_w32(priv
, REG_ESW_PORT_PVC(i
), 0x810000c0);
655 /* set all ports as security mode */
656 for (i
= 0; i
< MT7530_NUM_PORTS
; i
++)
657 mt7530_w32(priv
, REG_ESW_PORT_PCR(i
), 0x00ff0003);
659 /* check if a port is used in tag/untag vlan egress mode */
663 for (i
= 0; i
< MT7530_NUM_VLANS
; i
++) {
664 u8 member
= priv
->vlan_entries
[i
].member
;
665 u8 etags
= priv
->vlan_entries
[i
].etags
;
670 for (j
= 0; j
< MT7530_NUM_PORTS
; j
++) {
671 if (!(member
& BIT(j
)))
675 tag_ports
|= 1u << j
;
677 untag_ports
|= 1u << j
;
681 /* set all untag-only ports as transparent and the rest as user port */
682 for (i
= 0; i
< MT7530_NUM_PORTS
; i
++) {
683 u32 pvc_mode
= 0x81000000;
685 if (untag_ports
& BIT(i
) && !(tag_ports
& BIT(i
)))
686 pvc_mode
= 0x810000c0;
688 mt7530_w32(priv
, REG_ESW_PORT_PVC(i
), pvc_mode
);
691 /* first clear the swtich vlan table */
692 for (i
= 0; i
< MT7530_NUM_VLANS
; i
++)
693 mt7530_write_vlan_entry(priv
, i
, i
, 0, 0);
695 /* now program only vlans with members to avoid
696 clobbering remapped entries in later iterations */
697 for (i
= 0; i
< MT7530_NUM_VLANS
; i
++) {
698 u16 vid
= priv
->vlan_entries
[i
].vid
;
699 u8 member
= priv
->vlan_entries
[i
].member
;
700 u8 etags
= priv
->vlan_entries
[i
].etags
;
703 mt7530_write_vlan_entry(priv
, i
, vid
, member
, etags
);
706 /* Port Default PVID */
707 for (i
= 0; i
< MT7530_NUM_PORTS
; i
++) {
708 int vlan
= priv
->port_entries
[i
].pvid
;
712 if (vlan
< MT7530_NUM_VLANS
&& priv
->vlan_entries
[vlan
].member
)
713 pvid
= priv
->vlan_entries
[vlan
].vid
;
715 val
= mt7530_r32(priv
, REG_ESW_PORT_PPBV1(i
));
718 mt7530_w32(priv
, REG_ESW_PORT_PPBV1(i
), val
);
721 /* set mirroring source port */
722 for (i
= 0; i
< MT7530_NUM_PORTS
; i
++) {
723 u32 val
= mt7530_r32(priv
, REG_ESW_PORT_PCR(i
));
724 if (priv
->port_entries
[i
].mirror_rx
) {
725 val
|= REG_ESW_PORT_PCR_MIRROR_SRC_RX_BIT
;
729 if (priv
->port_entries
[i
].mirror_tx
) {
730 val
|= REG_ESW_PORT_PCR_MIRROR_SRC_TX_BIT
;
734 mt7530_w32(priv
, REG_ESW_PORT_PCR(i
), val
);
737 /* set mirroring monitor port */
739 u32 val
= mt7530_r32(priv
, REG_ESW_WT_MAC_MFC
);
740 val
|= REG_ESW_WT_MAC_MFC_MIRROR_ENABLE
;
741 val
&= ~REG_ESW_WT_MAC_MFC_MIRROR_DEST_MASK
;
742 val
|= priv
->mirror_dest_port
;
743 mt7530_w32(priv
, REG_ESW_WT_MAC_MFC
, val
);
750 mt7530_get_port_link(struct switch_dev
*dev
, int port
,
751 struct switch_port_link
*link
)
753 struct mt7530_priv
*priv
= container_of(dev
, struct mt7530_priv
, swdev
);
756 if (port
< 0 || port
>= MT7530_NUM_PORTS
)
759 pmsr
= mt7530_r32(priv
, 0x3008 + (0x100 * port
));
761 link
->link
= pmsr
& 1;
762 link
->duplex
= (pmsr
>> 1) & 1;
763 speed
= (pmsr
>> 2) & 3;
767 link
->speed
= SWITCH_PORT_SPEED_10
;
770 link
->speed
= SWITCH_PORT_SPEED_100
;
773 case 3: /* forced gige speed can be 2 or 3 */
774 link
->speed
= SWITCH_PORT_SPEED_1000
;
777 link
->speed
= SWITCH_PORT_SPEED_UNKNOWN
;
784 static u64
get_mib_counter(struct mt7530_priv
*priv
, int i
, int port
)
786 unsigned int port_base
;
789 port_base
= MT7621_MIB_COUNTER_BASE
+
790 MT7621_MIB_COUNTER_PORT_OFFSET
* port
;
792 lo
= mt7530_r32(priv
, port_base
+ mt7621_mibs
[i
].offset
);
793 if (mt7621_mibs
[i
].size
== 2) {
796 hi
= mt7530_r32(priv
, port_base
+ mt7621_mibs
[i
].offset
+ 4);
803 static int mt7621_sw_get_port_mib(struct switch_dev
*dev
,
804 const struct switch_attr
*attr
,
805 struct switch_val
*val
)
807 static char buf
[4096];
808 struct mt7530_priv
*priv
= container_of(dev
, struct mt7530_priv
, swdev
);
811 if (val
->port_vlan
>= MT7530_NUM_PORTS
)
814 len
+= snprintf(buf
+ len
, sizeof(buf
) - len
,
815 "Port %d MIB counters\n", val
->port_vlan
);
817 for (i
= 0; i
< ARRAY_SIZE(mt7621_mibs
); ++i
) {
819 len
+= snprintf(buf
+ len
, sizeof(buf
) - len
,
820 "%-11s: ", mt7621_mibs
[i
].name
);
821 counter
= get_mib_counter(priv
, i
, val
->port_vlan
);
822 len
+= snprintf(buf
+ len
, sizeof(buf
) - len
, "%llu\n",
831 static u64
get_mib_counter_7620(struct mt7530_priv
*priv
, int i
)
833 return mt7530_r32(priv
, MT7620_MIB_COUNTER_BASE
+ mt7620_mibs
[i
].offset
);
836 static u64
get_mib_counter_port_7620(struct mt7530_priv
*priv
, int i
, int port
)
838 return mt7530_r32(priv
,
839 MT7620_MIB_COUNTER_BASE_PORT
+
840 (MT7620_MIB_COUNTER_PORT_OFFSET
* port
) +
841 mt7620_port_mibs
[i
].offset
);
844 static int mt7530_sw_get_mib(struct switch_dev
*dev
,
845 const struct switch_attr
*attr
,
846 struct switch_val
*val
)
848 static char buf
[4096];
849 struct mt7530_priv
*priv
= container_of(dev
, struct mt7530_priv
, swdev
);
852 len
+= snprintf(buf
+ len
, sizeof(buf
) - len
, "Switch MIB counters\n");
854 for (i
= 0; i
< ARRAY_SIZE(mt7620_mibs
); ++i
) {
856 len
+= snprintf(buf
+ len
, sizeof(buf
) - len
,
857 "%-11s: ", mt7620_mibs
[i
].name
);
858 counter
= get_mib_counter_7620(priv
, i
);
859 len
+= snprintf(buf
+ len
, sizeof(buf
) - len
, "%llu\n",
868 static int mt7530_sw_get_port_mib(struct switch_dev
*dev
,
869 const struct switch_attr
*attr
,
870 struct switch_val
*val
)
872 static char buf
[4096];
873 struct mt7530_priv
*priv
= container_of(dev
, struct mt7530_priv
, swdev
);
876 if (val
->port_vlan
>= MT7530_NUM_PORTS
)
879 len
+= snprintf(buf
+ len
, sizeof(buf
) - len
,
880 "Port %d MIB counters\n", val
->port_vlan
);
882 for (i
= 0; i
< ARRAY_SIZE(mt7620_port_mibs
); ++i
) {
884 len
+= snprintf(buf
+ len
, sizeof(buf
) - len
,
885 "%-11s: ", mt7620_port_mibs
[i
].name
);
886 counter
= get_mib_counter_port_7620(priv
, i
, val
->port_vlan
);
887 len
+= snprintf(buf
+ len
, sizeof(buf
) - len
, "%llu\n",
896 static int mt7530_get_port_stats(struct switch_dev
*dev
, int port
,
897 struct switch_port_stats
*stats
)
899 struct mt7530_priv
*priv
= container_of(dev
, struct mt7530_priv
, swdev
);
901 if (port
< 0 || port
>= MT7530_NUM_PORTS
)
904 stats
->tx_bytes
= get_mib_counter_port_7620(priv
, MT7530_PORT_MIB_TXB_ID
, port
);
905 stats
->rx_bytes
= get_mib_counter_port_7620(priv
, MT7530_PORT_MIB_RXB_ID
, port
);
910 static int mt7621_get_port_stats(struct switch_dev
*dev
, int port
,
911 struct switch_port_stats
*stats
)
913 struct mt7530_priv
*priv
= container_of(dev
, struct mt7530_priv
, swdev
);
915 if (port
< 0 || port
>= MT7530_NUM_PORTS
)
918 stats
->tx_bytes
= get_mib_counter(priv
, MT7621_PORT_MIB_TXB_ID
, port
);
919 stats
->rx_bytes
= get_mib_counter(priv
, MT7621_PORT_MIB_RXB_ID
, port
);
924 static const struct switch_attr mt7530_global
[] = {
926 .type
= SWITCH_TYPE_INT
,
927 .name
= "enable_vlan",
928 .description
= "VLAN mode (1:enabled)",
930 .id
= MT7530_ATTR_ENABLE_VLAN
,
931 .get
= mt7530_get_vlan_enable
,
932 .set
= mt7530_set_vlan_enable
,
934 .type
= SWITCH_TYPE_STRING
,
936 .description
= "Get MIB counters for switch",
937 .get
= mt7530_sw_get_mib
,
940 .type
= SWITCH_TYPE_INT
,
941 .name
= "mirror_monitor_port",
942 .description
= "Mirror monitor port",
943 .set
= mt7530_set_mirror_monitor_port
,
944 .get
= mt7530_get_mirror_monitor_port
,
945 .max
= MT7530_NUM_PORTS
- 1
949 static const struct switch_attr mt7621_port
[] = {
951 .type
= SWITCH_TYPE_STRING
,
953 .description
= "Get MIB counters for port",
954 .get
= mt7621_sw_get_port_mib
,
957 .type
= SWITCH_TYPE_INT
,
958 .name
= "enable_mirror_rx",
959 .description
= "Enable mirroring of RX packets",
960 .set
= mt7530_set_port_mirror_rx
,
961 .get
= mt7530_get_port_mirror_rx
,
964 .type
= SWITCH_TYPE_INT
,
965 .name
= "enable_mirror_tx",
966 .description
= "Enable mirroring of TX packets",
967 .set
= mt7530_set_port_mirror_tx
,
968 .get
= mt7530_get_port_mirror_tx
,
973 static const struct switch_attr mt7621_vlan
[] = {
975 .type
= SWITCH_TYPE_INT
,
977 .description
= "VLAN ID (0-4094)",
978 .set
= mt7530_set_vid
,
979 .get
= mt7621_get_vid
,
984 static const struct switch_attr mt7530_port
[] = {
986 .type
= SWITCH_TYPE_STRING
,
988 .description
= "Get MIB counters for port",
989 .get
= mt7530_sw_get_port_mib
,
992 .type
= SWITCH_TYPE_INT
,
993 .name
= "enable_mirror_rx",
994 .description
= "Enable mirroring of RX packets",
995 .set
= mt7530_set_port_mirror_rx
,
996 .get
= mt7530_get_port_mirror_rx
,
999 .type
= SWITCH_TYPE_INT
,
1000 .name
= "enable_mirror_tx",
1001 .description
= "Enable mirroring of TX packets",
1002 .set
= mt7530_set_port_mirror_tx
,
1003 .get
= mt7530_get_port_mirror_tx
,
1008 static const struct switch_attr mt7530_vlan
[] = {
1010 .type
= SWITCH_TYPE_INT
,
1012 .description
= "VLAN ID (0-4094)",
1013 .set
= mt7530_set_vid
,
1014 .get
= mt7530_get_vid
,
1019 static const struct switch_dev_ops mt7621_ops
= {
1021 .attr
= mt7530_global
,
1022 .n_attr
= ARRAY_SIZE(mt7530_global
),
1025 .attr
= mt7621_port
,
1026 .n_attr
= ARRAY_SIZE(mt7621_port
),
1029 .attr
= mt7621_vlan
,
1030 .n_attr
= ARRAY_SIZE(mt7621_vlan
),
1032 .get_vlan_ports
= mt7530_get_vlan_ports
,
1033 .set_vlan_ports
= mt7530_set_vlan_ports
,
1034 .get_port_pvid
= mt7530_get_port_pvid
,
1035 .set_port_pvid
= mt7530_set_port_pvid
,
1036 .get_port_link
= mt7530_get_port_link
,
1037 .get_port_stats
= mt7621_get_port_stats
,
1038 .apply_config
= mt7530_apply_config
,
1039 .reset_switch
= mt7530_reset_switch
,
1042 static const struct switch_dev_ops mt7530_ops
= {
1044 .attr
= mt7530_global
,
1045 .n_attr
= ARRAY_SIZE(mt7530_global
),
1048 .attr
= mt7530_port
,
1049 .n_attr
= ARRAY_SIZE(mt7530_port
),
1052 .attr
= mt7530_vlan
,
1053 .n_attr
= ARRAY_SIZE(mt7530_vlan
),
1055 .get_vlan_ports
= mt7530_get_vlan_ports
,
1056 .set_vlan_ports
= mt7530_set_vlan_ports
,
1057 .get_port_pvid
= mt7530_get_port_pvid
,
1058 .set_port_pvid
= mt7530_set_port_pvid
,
1059 .get_port_link
= mt7530_get_port_link
,
1060 .get_port_stats
= mt7530_get_port_stats
,
1061 .apply_config
= mt7530_apply_config
,
1062 .reset_switch
= mt7530_reset_switch
,
1066 mt7530_probe(struct device
*dev
, void __iomem
*base
, struct mii_bus
*bus
, int vlan
)
1068 struct switch_dev
*swdev
;
1069 struct mt7530_priv
*mt7530
;
1070 struct mt7530_mapping
*map
;
1073 mt7530
= devm_kzalloc(dev
, sizeof(struct mt7530_priv
), GFP_KERNEL
);
1077 mt7530
->base
= base
;
1079 mt7530
->global_vlan_enable
= vlan
;
1081 swdev
= &mt7530
->swdev
;
1083 swdev
->alias
= "mt7530";
1084 swdev
->name
= "mt7530";
1085 } else if (IS_ENABLED(CONFIG_SOC_MT7621
)) {
1086 swdev
->alias
= "mt7621";
1087 swdev
->name
= "mt7621";
1089 swdev
->alias
= "mt7620";
1090 swdev
->name
= "mt7620";
1092 swdev
->cpu_port
= MT7530_CPU_PORT
;
1093 swdev
->ports
= MT7530_NUM_PORTS
;
1094 swdev
->vlans
= MT7530_NUM_VLANS
;
1095 if (IS_ENABLED(CONFIG_SOC_MT7621
))
1096 swdev
->ops
= &mt7621_ops
;
1098 swdev
->ops
= &mt7530_ops
;
1100 ret
= register_switch(swdev
, NULL
);
1102 dev_err(dev
, "failed to register mt7530\n");
1107 map
= mt7530_find_mapping(dev
->of_node
);
1109 mt7530_apply_mapping(mt7530
, map
);
1110 mt7530_apply_config(swdev
);
1113 if (!IS_ENABLED(CONFIG_SOC_MT7621
) && bus
&& mt7530_r32(mt7530
, REG_HWTRAP
) != 0x1117edf) {
1114 dev_info(dev
, "fixing up MHWTRAP register - bootloader probably played with it\n");
1115 mt7530_w32(mt7530
, REG_HWTRAP
, 0x1117edf);
1117 dev_info(dev
, "loaded %s driver\n", swdev
->name
);