1 From dd4f939bb7c30f9256a35d31de673241ead350ab Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Fri, 24 Jan 2014 17:01:22 +0100
4 Subject: [PATCH 208/215] MIPS: ralink: add MT7621 dts file
6 Signed-off-by: John Crispin <blogic@openwrt.org>
8 arch/mips/ralink/dts/Makefile | 1 +
9 arch/mips/ralink/dts/mt7621.dtsi | 257 ++++++++++++++++++++++++++++++++++
10 arch/mips/ralink/dts/mt7621_eval.dts | 16 +++
11 3 files changed, 274 insertions(+)
12 create mode 100644 arch/mips/ralink/dts/mt7621.dtsi
13 create mode 100644 arch/mips/ralink/dts/mt7621_eval.dts
15 --- a/arch/mips/ralink/dts/Makefile
16 +++ b/arch/mips/ralink/dts/Makefile
17 @@ -2,3 +2,4 @@ obj-$(CONFIG_DTB_RT2880_EVAL) := rt2880_
18 obj-$(CONFIG_DTB_RT305X_EVAL) := rt3052_eval.dtb.o
19 obj-$(CONFIG_DTB_RT3883_EVAL) := rt3883_eval.dtb.o
20 obj-$(CONFIG_DTB_MT7620A_EVAL) := mt7620a_eval.dtb.o
21 +obj-$(CONFIG_DTB_MT7621_EVAL) := mt7621_eval.dtb.o
23 +++ b/arch/mips/ralink/dts/mt7621.dtsi
26 + #address-cells = <1>;
28 + compatible = "ralink,mtk7620a-soc";
32 + compatible = "mips,mips24KEc";
36 + cpuintc: cpuintc@0 {
37 + #address-cells = <0>;
38 + #interrupt-cells = <1>;
39 + interrupt-controller;
40 + compatible = "mti,cpu-interrupt-controller";
44 + compatible = "palmbus";
45 + reg = <0x1E000000 0x100000>;
46 + ranges = <0x0 0x1E000000 0x0FFFFF>;
48 + #address-cells = <1>;
52 + compatible = "mtk,mt7621-sysc";
57 + compatible = "mtk,mt7621-wdt";
58 + reg = <0x100 0x100>;
62 + #address-cells = <1>;
65 + compatible = "mtk,mt7621-gpio";
66 + reg = <0x600 0x100>;
70 + compatible = "mtk,mt7621-gpio-bank";
77 + compatible = "mtk,mt7621-gpio-bank";
84 + compatible = "mtk,mt7621-gpio-bank";
91 + compatible = "mtk,mt7621-memc";
92 + reg = <0x300 0x100>;
96 + compatible = "ns16550a";
97 + reg = <0xc00 0x100>;
99 + interrupt-parent = <&gic>;
103 + reg-io-width = <4>;
108 + compatible = "ns16550a";
109 + reg = <0xd00 0x100>;
111 + interrupt-parent = <&gic>;
116 + reg-io-width = <4>;
123 + compatible = "ralink,mt7621-spi";
124 + reg = <0xb00 0x100>;
126 + resets = <&rstctrl 18>;
127 + reset-names = "spi";
129 + #address-cells = <1>;
132 +/* pinctrl-names = "default";
133 + pinctrl-0 = <&spi_pins>;*/
136 + #address-cells = <1>;
138 + compatible = "en25q64";
140 + linux,modalias = "m25p80", "en25q64";
141 + spi-max-frequency = <10000000>;
147 + reg = <0x0 0x30000>;
152 + label = "u-boot-env";
153 + reg = <0x30000 0x10000>;
157 + factory: partition@40000 {
159 + reg = <0x40000 0x10000>;
164 + label = "firmware";
165 + reg = <0x50000 0x7a0000>;
170 + reg = <0x7f0000 0x10000>;
177 + compatible = "ralink,rt2880-reset";
178 + #reset-cells = <1>;
182 + compatible = "ralink,mt7620a-sdhci";
183 + reg = <0x1E130000 4000>;
185 + interrupt-parent = <&gic>;
190 + compatible = "xhci-platform";
191 + reg = <0x1E1C0000 4000>;
193 + interrupt-parent = <&gic>;
197 + gic: gic@1fbc0000 {
198 + #address-cells = <0>;
199 + #interrupt-cells = <1>;
200 + interrupt-controller;
201 + compatible = "ralink,mt7621-gic";
202 + reg = < 0x1fbc0000 0x80 /* gic */
203 + 0x1fbf0000 0x8000 /* cpc */
204 + 0x1fbf8000 0x8000 /* gpmc */
209 + compatible = "mtk,mt7621-nand";
211 + reg = <0x1e003000 0x800
213 + #address-cells = <1>;
218 + reg = <0x00000 0x80000>; /* 64 KB */
221 + label = "uboot_env";
222 + reg = <0x80000 0x80000>; /* 64 KB */
226 + reg = <0x100000 0x40000>;
230 + reg = <0x140000 0xec0000>;
234 + ethernet@1e100000 {
235 + compatible = "ralink,mt7621-eth";
236 + reg = <0x1e100000 10000>;
238 + #address-cells = <1>;
241 + ralink,port-map = "llllw";
243 + interrupt-parent = <&gic>;
246 +/* resets = <&rstctrl 21 &rstctrl 23>;
247 + reset-names = "fe", "esw";
250 + compatible = "ralink,mt7620a-gsw-port", "ralink,eth-port";
253 + status = "disabled";
257 + compatible = "ralink,mt7620a-gsw-port", "ralink,eth-port";
260 + status = "disabled";
264 + #address-cells = <1>;
267 + phy1f: ethernet-phy@1f {
269 + phy-mode = "rgmii";
271 +/* interrupt-parent = <&gic>;
278 + compatible = "ralink,mt7620a-gsw";
279 + reg = <0x1e110000 8000>;
283 +++ b/arch/mips/ralink/dts/mt7621_eval.dts
287 +/include/ "mt7621.dtsi"
290 + compatible = "ralink,mt7621-eval-board", "ralink,mt7621-soc";
291 + model = "Ralink MT7621 evaluation board";
294 + reg = <0x0 0x2000000>;
298 + bootargs = "console=ttyS0,57600";