1 From c72bc41d018519de5d63ec7790965fbf4605276a Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Tue, 3 Dec 2013 20:18:13 +0100
4 Subject: [PATCH] asoc: add mt7620 support
6 Signed-off-by: John Crispin <blogic@openwrt.org>
8 sound/soc/Kconfig | 1 +
9 sound/soc/Makefile | 1 +
10 sound/soc/ralink/Kconfig | 24 +++
11 sound/soc/ralink/Makefile | 13 ++
12 sound/soc/ralink/mt7620-i2s.c | 429 ++++++++++++++++++++++++++++++++++++++
13 sound/soc/ralink/mt7620-pcm.c | 77 +++++++
14 sound/soc/ralink/mt7620-wm8960.c | 124 +++++++++++
15 7 files changed, 669 insertions(+)
16 create mode 100644 sound/soc/ralink/Kconfig
17 create mode 100644 sound/soc/ralink/Makefile
18 create mode 100644 sound/soc/ralink/mt7620-i2s.c
19 create mode 100644 sound/soc/ralink/mt7620-pcm.c
20 create mode 100644 sound/soc/ralink/mt7620-wm8960.c
22 --- a/sound/soc/Kconfig
23 +++ b/sound/soc/Kconfig
24 @@ -48,6 +48,7 @@ source "sound/soc/kirkwood/Kconfig"
25 source "sound/soc/mid-x86/Kconfig"
26 source "sound/soc/mxs/Kconfig"
27 source "sound/soc/pxa/Kconfig"
28 +source "sound/soc/ralink/Kconfig"
29 source "sound/soc/samsung/Kconfig"
30 source "sound/soc/s6000/Kconfig"
31 source "sound/soc/sh/Kconfig"
32 --- a/sound/soc/Makefile
33 +++ b/sound/soc/Makefile
34 @@ -26,6 +26,7 @@ obj-$(CONFIG_SND_SOC) += nuc900/
35 obj-$(CONFIG_SND_SOC) += omap/
36 obj-$(CONFIG_SND_SOC) += kirkwood/
37 obj-$(CONFIG_SND_SOC) += pxa/
38 +obj-$(CONFIG_SND_SOC) += ralink/
39 obj-$(CONFIG_SND_SOC) += samsung/
40 obj-$(CONFIG_SND_SOC) += s6000/
41 obj-$(CONFIG_SND_SOC) += sh/
43 +++ b/sound/soc/ralink/Kconfig
45 +config SND_MT7620_SOC_I2S
46 + depends on SOC_MT7620 && SND_SOC
47 + select SND_SOC_GENERIC_DMAENGINE_PCM
48 + tristate "SoC Audio (I2S protocol) for Ralink MT7620 SoC"
50 + Say Y if you want to use I2S protocol and I2S codec on Ingenic MT7620
53 +config SND_MT7620_SOC_WM8960
54 + tristate "SoC Audio support for Ralink WM8960"
55 + select SND_MT7620_SOC_I2S
56 + select SND_SOC_WM8960
58 + Say Y if you want to add support for ASoC audio on the Qi LB60 board
59 + a.k.a Qi Ben NanoNote.
61 +++ b/sound/soc/ralink/Makefile
64 +# Jz4740 Platform Support
66 +snd-soc-mt7620-i2s-objs := mt7620-i2s.o
68 +obj-$(CONFIG_SND_MT7620_SOC_I2S) += snd-soc-mt7620-i2s.o
70 +# Jz4740 Machine Support
71 +snd-soc-mt7620-wm8960-objs := mt7620-wm8960.o
73 +obj-$(CONFIG_SND_MT7620_SOC_WM8960) += snd-soc-mt7620-wm8960.o
75 +++ b/sound/soc/ralink/mt7620-i2s.c
78 + * Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
80 + * This program is free software; you can redistribute it and/or modify it
81 + * under the terms of the GNU General Public License as published by the
82 + * Free Software Foundation; either version 2 of the License, or (at your
83 + * option) any later version.
85 + * You should have received a copy of the GNU General Public License along
86 + * with this program; if not, write to the Free Software Foundation, Inc.,
87 + * 675 Mass Ave, Cambridge, MA 02139, USA.
91 +#include <linux/init.h>
92 +#include <linux/io.h>
93 +#include <linux/kernel.h>
94 +#include <linux/module.h>
95 +#include <linux/platform_device.h>
96 +#include <linux/slab.h>
98 +#include <linux/delay.h>
100 +#include <linux/dma-mapping.h>
102 +#include <sound/core.h>
103 +#include <sound/pcm.h>
104 +#include <sound/pcm_params.h>
105 +#include <sound/soc.h>
106 +#include <sound/initval.h>
107 +#include <sound/dmaengine_pcm.h>
109 +#include <ralink_regs.h>
111 +#define I2S_REG_CFG0 0x00
112 +#define I2S_REG_CFG0_EN BIT(31)
113 +#define I2S_REG_CFG0_DMA_EN BIT(30)
114 +#define I2S_REG_CFG0_BYTE_SWAP BIT(28)
115 +#define I2S_REG_CFG0_TX_EN BIT(24)
116 +#define I2S_REG_CFG0_RX_EN BIT(20)
117 +#define I2S_REG_CFG0_SLAVE BIT(16)
118 +#define I2S_REG_CFG0_RX_THRES 12
119 +#define I2S_REG_CFG0_TX_THRES 4
120 +#define I2S_REG_CFG0_DFT_THRES (4 << I2S_REG_CFG0_RX_THRES) | \
121 + (4 << I2S_REG_CFG0_TX_THRES)
123 +#define I2S_REG_INT_STATUS 0x04
124 +#define I2S_REG_INT_EN 0x08
125 +#define I2S_REG_FF_STATUS 0x0c
126 +#define I2S_REG_WREG 0x10
127 +#define I2S_REG_RREG 0x14
128 +#define I2S_REG_CFG1 0x18
130 +#define I2S_REG_DIVCMP 0x20
131 +#define I2S_REG_DIVINT 0x24
132 +#define I2S_REG_CLK_EN BIT(31)
135 + struct resource *mem;
136 + void __iomem *base;
137 + dma_addr_t phys_base;
139 + struct snd_dmaengine_dai_dma_data playback_dma_data;
140 + struct snd_dmaengine_dai_dma_data capture_dma_data;
143 +static inline uint32_t mt7620_i2s_read(const struct mt7620_i2s *i2s,
146 + return readl(i2s->base + reg);
149 +static inline void mt7620_i2s_write(const struct mt7620_i2s *i2s,
150 + unsigned int reg, uint32_t value)
152 + //printk("i2s --> %p = 0x%08X\n", i2s->base + reg, value);
153 + writel(value, i2s->base + reg);
156 +static int mt7620_i2s_startup(struct snd_pcm_substream *substream,
157 + struct snd_soc_dai *dai)
159 + struct mt7620_i2s *i2s = snd_soc_dai_get_drvdata(dai);
165 + cfg = mt7620_i2s_read(i2s, I2S_REG_CFG0);
166 + cfg |= I2S_REG_CFG0_EN;
167 + mt7620_i2s_write(i2s, I2S_REG_CFG0, cfg);
172 +static void mt7620_i2s_shutdown(struct snd_pcm_substream *substream,
173 + struct snd_soc_dai *dai)
175 + struct mt7620_i2s *i2s = snd_soc_dai_get_drvdata(dai);
181 + cfg = mt7620_i2s_read(i2s, I2S_REG_CFG0);
182 + cfg &= ~I2S_REG_CFG0_EN;
183 + mt7620_i2s_write(i2s, I2S_REG_CFG0, cfg);
186 +static int mt7620_i2s_trigger(struct snd_pcm_substream *substream, int cmd,
187 + struct snd_soc_dai *dai)
189 + struct mt7620_i2s *i2s = snd_soc_dai_get_drvdata(dai);
194 + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
195 + mask = I2S_REG_CFG0_TX_EN;
197 + mask = I2S_REG_CFG0_RX_EN;
199 + cfg = mt7620_i2s_read(i2s, I2S_REG_CFG0);
202 + case SNDRV_PCM_TRIGGER_START:
203 + case SNDRV_PCM_TRIGGER_RESUME:
204 + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
207 + case SNDRV_PCM_TRIGGER_STOP:
208 + case SNDRV_PCM_TRIGGER_SUSPEND:
209 + case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
216 + if (cfg & (I2S_REG_CFG0_TX_EN | I2S_REG_CFG0_RX_EN))
217 + cfg |= I2S_REG_CFG0_DMA_EN;
219 + cfg &= ~I2S_REG_CFG0_DMA_EN;
221 + mt7620_i2s_write(i2s, I2S_REG_CFG0, cfg);
226 +static int mt7620_i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
228 + struct mt7620_i2s *i2s = snd_soc_dai_get_drvdata(dai);
231 + cfg = mt7620_i2s_read(i2s, I2S_REG_CFG0);
233 + switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
234 + case SND_SOC_DAIFMT_CBS_CFS:
235 + cfg |= I2S_REG_CFG0_SLAVE;
237 + case SND_SOC_DAIFMT_CBM_CFM:
238 + cfg &= ~I2S_REG_CFG0_SLAVE;
240 + case SND_SOC_DAIFMT_CBM_CFS:
245 + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
246 + case SND_SOC_DAIFMT_I2S:
247 + case SND_SOC_DAIFMT_MSB:
248 + cfg &= ~I2S_REG_CFG0_BYTE_SWAP;
250 + case SND_SOC_DAIFMT_LSB:
251 + cfg |= I2S_REG_CFG0_BYTE_SWAP;
257 + switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
258 + case SND_SOC_DAIFMT_NB_NF:
264 + mt7620_i2s_write(i2s, I2S_REG_CFG0, cfg);
269 +static int mt7620_i2s_hw_params(struct snd_pcm_substream *substream,
270 + struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
276 +unsigned long i2sMaster_inclk_int[11] = {
277 + 78, 56, 52, 39, 28, 26, 19, 14, 13, 9, 6};
278 +unsigned long i2sMaster_inclk_comp[11] = {
279 + 64, 352, 42, 32, 176, 21, 272, 88, 10, 455, 261};
282 +static int mt7620_i2s_set_sysclk(struct snd_soc_dai *dai, int clk_id,
283 + unsigned int freq, int dir)
285 + struct mt7620_i2s *i2s = snd_soc_dai_get_drvdata(dai);
287 + printk("Internal REFCLK with fractional division\n");
289 + mt7620_i2s_write(i2s, I2S_REG_DIVINT, i2sMaster_inclk_int[7]);
290 + mt7620_i2s_write(i2s, I2S_REG_DIVCMP,
291 + i2sMaster_inclk_comp[7] | I2S_REG_CLK_EN);
293 +/* struct mt7620_i2s *i2s = snd_soc_dai_get_drvdata(dai);
294 + struct clk *parent;
298 + case JZ4740_I2S_CLKSRC_EXT:
299 + parent = clk_get(NULL, "ext");
300 + clk_set_parent(i2s->clk_i2s, parent);
302 + case JZ4740_I2S_CLKSRC_PLL:
303 + parent = clk_get(NULL, "pll half");
304 + clk_set_parent(i2s->clk_i2s, parent);
305 + ret = clk_set_rate(i2s->clk_i2s, freq);
316 +static int mt7620_i2s_suspend(struct snd_soc_dai *dai)
318 + struct mt7620_i2s *i2s = snd_soc_dai_get_drvdata(dai);
322 + cfg = mt7620_i2s_read(i2s, I2S_REG_CFG0);
323 + cfg &= ~I2S_REG_CFG0_TX_EN;
324 + mt7620_i2s_write(i2s, I2S_REG_CFG0, cfg);
330 +static int mt7620_i2s_resume(struct snd_soc_dai *dai)
332 + struct mt7620_i2s *i2s = snd_soc_dai_get_drvdata(dai);
336 + cfg = mt7620_i2s_read(i2s, I2S_REG_CFG0);
337 + cfg |= I2S_REG_CFG0_TX_EN;
338 + mt7620_i2s_write(i2s, I2S_REG_CFG0, cfg);
344 +static void mt7620_i2c_init_pcm_config(struct mt7620_i2s *i2s)
346 + struct snd_dmaengine_dai_dma_data *dma_data;
349 + dma_data = &i2s->playback_dma_data;
350 + dma_data->maxburst = 16;
351 + dma_data->slave_id = 2; //JZ4740_DMA_TYPE_AIC_TRANSMIT;
352 + dma_data->addr = i2s->phys_base + I2S_REG_WREG;
355 + dma_data = &i2s->capture_dma_data;
356 + dma_data->maxburst = 16;
357 + dma_data->slave_id = 3; //JZ4740_DMA_TYPE_AIC_RECEIVE;
358 + dma_data->addr = i2s->phys_base + I2S_REG_RREG;
361 +static int mt7620_i2s_dai_probe(struct snd_soc_dai *dai)
363 + struct mt7620_i2s *i2s = snd_soc_dai_get_drvdata(dai);
366 + mt7620_i2c_init_pcm_config(i2s);
367 + dai->playback_dma_data = &i2s->playback_dma_data;
368 + dai->capture_dma_data = &i2s->capture_dma_data;
370 + /* set share pins to i2s/gpio mode and i2c mode */
371 + data = rt_sysc_r32(0x60);
372 + data &= 0xFFFFFFE2;
373 + data |= 0x00000018;
374 + rt_sysc_w32(data, 0x60);
376 + printk("Internal REFCLK with fractional division\n");
378 + mt7620_i2s_write(i2s, I2S_REG_CFG0, I2S_REG_CFG0_DFT_THRES);
379 + mt7620_i2s_write(i2s, I2S_REG_CFG1, 0);
380 + mt7620_i2s_write(i2s, I2S_REG_INT_EN, 0);
382 + mt7620_i2s_write(i2s, I2S_REG_DIVINT, i2sMaster_inclk_int[7]);
383 + mt7620_i2s_write(i2s, I2S_REG_DIVCMP,
384 + i2sMaster_inclk_comp[7] | I2S_REG_CLK_EN);
389 +static int mt7620_i2s_dai_remove(struct snd_soc_dai *dai)
394 +static const struct snd_soc_dai_ops mt7620_i2s_dai_ops = {
395 + .startup = mt7620_i2s_startup,
396 + .shutdown = mt7620_i2s_shutdown,
397 + .trigger = mt7620_i2s_trigger,
398 + .hw_params = mt7620_i2s_hw_params,
399 + .set_fmt = mt7620_i2s_set_fmt,
400 + .set_sysclk = mt7620_i2s_set_sysclk,
403 +#define JZ4740_I2S_FMTS (SNDRV_PCM_FMTBIT_S8 | \
404 + SNDRV_PCM_FMTBIT_S16_LE)
406 +static struct snd_soc_dai_driver mt7620_i2s_dai = {
407 + .probe = mt7620_i2s_dai_probe,
408 + .remove = mt7620_i2s_dai_remove,
412 + .rates = SNDRV_PCM_RATE_8000_48000,
413 + .formats = JZ4740_I2S_FMTS,
418 + .rates = SNDRV_PCM_RATE_8000_48000,
419 + .formats = JZ4740_I2S_FMTS,
421 + .symmetric_rates = 1,
422 + .ops = &mt7620_i2s_dai_ops,
423 + .suspend = mt7620_i2s_suspend,
424 + .resume = mt7620_i2s_resume,
427 +static const struct snd_pcm_hardware mt7620_pcm_hardware = {
428 + .info = SNDRV_PCM_INFO_MMAP |
429 + SNDRV_PCM_INFO_MMAP_VALID |
430 + SNDRV_PCM_INFO_INTERLEAVED |
431 + SNDRV_PCM_INFO_BLOCK_TRANSFER,
432 + .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8,
433 + .period_bytes_min = PAGE_SIZE,
434 + .period_bytes_max = 64 * 1024,
436 + .periods_max = 128,
437 + .buffer_bytes_max = 128 * 1024,
441 +static const struct snd_dmaengine_pcm_config mt7620_dmaengine_pcm_config = {
442 + .prepare_slave_config = snd_dmaengine_pcm_prepare_slave_config,
443 + .pcm_hardware = &mt7620_pcm_hardware,
444 + .prealloc_buffer_size = 256 * PAGE_SIZE,
447 +static const struct snd_soc_component_driver mt7620_i2s_component = {
448 + .name = "mt7620-i2s",
451 +static int mt7620_i2s_dev_probe(struct platform_device *pdev)
453 + struct mt7620_i2s *i2s;
456 + snd_dmaengine_pcm_register(&pdev->dev,
457 + &mt7620_dmaengine_pcm_config,
458 + SND_DMAENGINE_PCM_FLAG_COMPAT);
460 + i2s = kzalloc(sizeof(*i2s), GFP_KERNEL);
464 + i2s->mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
470 + i2s->mem = request_mem_region(i2s->mem->start, resource_size(i2s->mem),
477 + i2s->base = ioremap_nocache(i2s->mem->start, resource_size(i2s->mem));
480 + goto err_release_mem_region;
483 + i2s->phys_base = i2s->mem->start;
485 + platform_set_drvdata(pdev, i2s);
486 + ret = snd_soc_register_component(&pdev->dev, &mt7620_i2s_component,
487 + &mt7620_i2s_dai, 1);
490 + dev_err(&pdev->dev, "loaded\n");
494 + dev_err(&pdev->dev, "Failed to register DAI\n");
495 + iounmap(i2s->base);
497 +err_release_mem_region:
498 + release_mem_region(i2s->mem->start, resource_size(i2s->mem));
505 +static int mt7620_i2s_dev_remove(struct platform_device *pdev)
507 + struct mt7620_i2s *i2s = platform_get_drvdata(pdev);
509 + snd_soc_unregister_component(&pdev->dev);
511 + iounmap(i2s->base);
512 + release_mem_region(i2s->mem->start, resource_size(i2s->mem));
516 + snd_dmaengine_pcm_unregister(&pdev->dev);
521 +static const struct of_device_id mt7620_i2s_match[] = {
522 + { .compatible = "ralink,mt7620a-i2s" },
525 +MODULE_DEVICE_TABLE(of, mt7620_i2s_match);
527 +static struct platform_driver mt7620_i2s_driver = {
528 + .probe = mt7620_i2s_dev_probe,
529 + .remove = mt7620_i2s_dev_remove,
531 + .name = "mt7620-i2s",
532 + .owner = THIS_MODULE,
533 + .of_match_table = mt7620_i2s_match,
537 +module_platform_driver(mt7620_i2s_driver);
539 +MODULE_AUTHOR("Lars-Peter Clausen, <lars@metafoo.de>");
540 +MODULE_DESCRIPTION("Ingenic JZ4740 SoC I2S driver");
541 +MODULE_LICENSE("GPL");
542 +MODULE_ALIAS("platform:mt7620-i2s");
544 +++ b/sound/soc/ralink/mt7620-wm8960.c
547 + * Copyright (C) 2009, Lars-Peter Clausen <lars@metafoo.de>
549 + * This program is free software; you can redistribute it and/or modify
550 + * it under the terms of the GNU General Public License version 2 as
551 + * published by the Free Software Foundation.
553 + * You should have received a copy of the GNU General Public License along
554 + * with this program; if not, write to the Free Software Foundation, Inc.,
555 + * 675 Mass Ave, Cambridge, MA 02139, USA.
559 +#include <linux/module.h>
560 +#include <linux/moduleparam.h>
561 +#include <linux/of.h>
562 +#include <linux/timer.h>
563 +#include <linux/interrupt.h>
564 +#include <linux/platform_device.h>
565 +#include <sound/core.h>
566 +#include <sound/pcm.h>
567 +#include <sound/soc.h>
570 +static const struct snd_soc_dapm_widget mt7620_wm8960_widgets[] = {
571 + SND_SOC_DAPM_SPK("Speaker", NULL),
574 +static const struct snd_soc_dapm_route mt7620_wm8960_routes[] = {
575 + {"Speaker", NULL, "HP_L"},
576 + {"Speaker", NULL, "HP_R"},
579 +#define MT7620_DAIFMT (SND_SOC_DAIFMT_I2S | \
580 + SND_SOC_DAIFMT_NB_NF | \
581 + SND_SOC_DAIFMT_CBM_CFM)
583 +static int mt7620_wm8960_codec_init(struct snd_soc_pcm_runtime *rtd)
585 + struct snd_soc_codec *codec = rtd->codec;
586 + struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
587 + struct snd_soc_dapm_context *dapm = &codec->dapm;
590 + snd_soc_dapm_enable_pin(dapm, "HP_L");
591 + snd_soc_dapm_enable_pin(dapm, "HP_R");
593 + ret = snd_soc_dai_set_fmt(cpu_dai, MT7620_DAIFMT);
595 + dev_err(codec->dev, "Failed to set cpu dai format: %d\n", ret);
602 +static struct snd_soc_dai_link mt7620_wm8960_dai = {
604 + .stream_name = "mt7620",
605 + .init = mt7620_wm8960_codec_init,
606 + .codec_dai_name = "wm8960-hifi",
609 +static struct snd_soc_card mt7620_wm8960 = {
610 + .name = "mt7620-wm8960",
611 + .owner = THIS_MODULE,
612 + .dai_link = &mt7620_wm8960_dai,
615 + .dapm_widgets = mt7620_wm8960_widgets,
616 + .num_dapm_widgets = ARRAY_SIZE(mt7620_wm8960_widgets),
617 + .dapm_routes = mt7620_wm8960_routes,
618 + .num_dapm_routes = ARRAY_SIZE(mt7620_wm8960_routes),
621 +static int mt7620_wm8960_probe(struct platform_device *pdev)
623 + struct device_node *np = pdev->dev.of_node;
624 + struct snd_soc_card *card = &mt7620_wm8960;
627 + card->dev = &pdev->dev;
629 + mt7620_wm8960_dai.cpu_of_node = of_parse_phandle(np, "cpu-dai", 0);
630 + mt7620_wm8960_dai.codec_of_node = of_parse_phandle(np, "codec-dai", 0);
631 + mt7620_wm8960_dai.platform_of_node = mt7620_wm8960_dai.cpu_of_node;
633 + ret = snd_soc_register_card(card);
635 + dev_err(&pdev->dev, "snd_soc_register_card() failed: %d\n",
641 +static int mt7620_wm8960_remove(struct platform_device *pdev)
643 + struct snd_soc_card *card = platform_get_drvdata(pdev);
645 + snd_soc_unregister_card(card);
649 +static const struct of_device_id mt7620_audio_match[] = {
650 + { .compatible = "ralink,wm8960-audio" },
653 +MODULE_DEVICE_TABLE(of, mt7620_audio_match);
655 +static struct platform_driver mt7620_wm8960_driver = {
657 + .name = "wm8960-audio",
658 + .owner = THIS_MODULE,
659 + .of_match_table = mt7620_audio_match,
661 + .probe = mt7620_wm8960_probe,
662 + .remove = mt7620_wm8960_remove,
665 +module_platform_driver(mt7620_wm8960_driver);
667 +MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
668 +MODULE_DESCRIPTION("ALSA SoC QI LB60 Audio support");
669 +MODULE_LICENSE("GPL v2");
670 +MODULE_ALIAS("platform:qi-lb60-audio");
671 --- a/arch/mips/ralink/of.c
672 +++ b/arch/mips/ralink/of.c
674 #include <linux/of_fdt.h>
675 #include <linux/kernel.h>
676 #include <linux/bootmem.h>
677 +#include <linux/module.h>
678 #include <linux/of_platform.h>
679 #include <linux/of_address.h>
684 __iomem void *rt_sysc_membase;
685 +EXPORT_SYMBOL(rt_sysc_membase);
686 __iomem void *rt_memc_membase;
688 extern struct boot_param_header __dtb_start;
689 --- a/sound/soc/soc-io.c
690 +++ b/sound/soc/soc-io.c
693 #include <trace/events/asoc.h>
695 -#ifdef CONFIG_REGMAP
696 static int hw_write(struct snd_soc_codec *codec, unsigned int reg,
699 @@ -161,12 +160,3 @@ int snd_soc_codec_set_cache_io(struct sn
700 return PTR_RET(codec->control_data);
702 EXPORT_SYMBOL_GPL(snd_soc_codec_set_cache_io);
704 -int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec,
705 - int addr_bits, int data_bits,
706 - enum snd_soc_control_type control)
710 -EXPORT_SYMBOL_GPL(snd_soc_codec_set_cache_io);