1 From 0757f88781dca6b29de4e1578a4900715371a926 Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Fri, 12 Apr 2013 06:27:41 +0000
4 Subject: [PATCH 36/79] DT: MIPS: ralink: add MT7620A dts files
6 Add a dtsi file for MT7620A SoC and a sample dts file.
8 Signed-off-by: John Crispin <blogic@openwrt.org>
9 Acked-by: Grant Likely <grant.likely@secretlab.ca>
10 Patchwork: http://patchwork.linux-mips.org/patch/5190/
12 arch/mips/ralink/Kconfig | 4 +++
13 arch/mips/ralink/dts/Makefile | 1 +
14 arch/mips/ralink/dts/mt7620a.dtsi | 58 +++++++++++++++++++++++++++++++++
15 arch/mips/ralink/dts/mt7620a_eval.dts | 16 +++++++++
16 4 files changed, 79 insertions(+)
17 create mode 100644 arch/mips/ralink/dts/mt7620a.dtsi
18 create mode 100644 arch/mips/ralink/dts/mt7620a_eval.dts
20 diff --git a/arch/mips/ralink/Kconfig b/arch/mips/ralink/Kconfig
21 index 493411f..026e823 100644
22 --- a/arch/mips/ralink/Kconfig
23 +++ b/arch/mips/ralink/Kconfig
24 @@ -46,6 +46,10 @@ choice
25 bool "RT3883 eval kit"
28 + config DTB_MT7620A_EVAL
29 + bool "MT7620A eval kit"
30 + depends on SOC_MT7620
35 diff --git a/arch/mips/ralink/dts/Makefile b/arch/mips/ralink/dts/Makefile
36 index 040a986..18194fa 100644
37 --- a/arch/mips/ralink/dts/Makefile
38 +++ b/arch/mips/ralink/dts/Makefile
40 obj-$(CONFIG_DTB_RT2880_EVAL) := rt2880_eval.dtb.o
41 obj-$(CONFIG_DTB_RT305X_EVAL) := rt3052_eval.dtb.o
42 obj-$(CONFIG_DTB_RT3883_EVAL) := rt3883_eval.dtb.o
43 +obj-$(CONFIG_DTB_MT7620A_EVAL) := mt7620a_eval.dtb.o
44 diff --git a/arch/mips/ralink/dts/mt7620a.dtsi b/arch/mips/ralink/dts/mt7620a.dtsi
46 index 0000000..08bf24f
48 +++ b/arch/mips/ralink/dts/mt7620a.dtsi
51 + #address-cells = <1>;
53 + compatible = "ralink,mtk7620a-soc";
57 + compatible = "mips,mips24KEc";
61 + cpuintc: cpuintc@0 {
62 + #address-cells = <0>;
63 + #interrupt-cells = <1>;
64 + interrupt-controller;
65 + compatible = "mti,cpu-interrupt-controller";
69 + compatible = "palmbus";
70 + reg = <0x10000000 0x200000>;
71 + ranges = <0x0 0x10000000 0x1FFFFF>;
73 + #address-cells = <1>;
77 + compatible = "ralink,mt7620a-sysc";
82 + compatible = "ralink,mt7620a-intc", "ralink,rt2880-intc";
83 + reg = <0x200 0x100>;
85 + interrupt-controller;
86 + #interrupt-cells = <1>;
88 + interrupt-parent = <&cpuintc>;
93 + compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
94 + reg = <0x300 0x100>;
98 + compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
99 + reg = <0xc00 0x100>;
101 + interrupt-parent = <&intc>;
108 diff --git a/arch/mips/ralink/dts/mt7620a_eval.dts b/arch/mips/ralink/dts/mt7620a_eval.dts
110 index 0000000..35eb874
112 +++ b/arch/mips/ralink/dts/mt7620a_eval.dts
116 +/include/ "mt7620a.dtsi"
119 + compatible = "ralink,mt7620a-eval-board", "ralink,mt7620a-soc";
120 + model = "Ralink MT7620A evaluation board";
123 + reg = <0x0 0x2000000>;
127 + bootargs = "console=ttyS0,57600";