1 From 7f29222b1731e8182ba94a331531dec18865a1e4 Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Sun, 27 Jul 2014 09:31:47 +0100
4 Subject: [PATCH 48/53] asoc: add mt7620 support
6 Signed-off-by: John Crispin <blogic@openwrt.org>
8 arch/mips/ralink/of.c | 2 +
9 sound/soc/Kconfig | 1 +
10 sound/soc/Makefile | 1 +
11 sound/soc/ralink/Kconfig | 15 ++
12 sound/soc/ralink/Makefile | 11 +
13 sound/soc/ralink/mt7620-i2s.c | 436 ++++++++++++++++++++++++++++++++++++++
14 sound/soc/ralink/mt7620-wm8960.c | 233 ++++++++++++++++++++
15 7 files changed, 699 insertions(+)
16 create mode 100644 sound/soc/ralink/Kconfig
17 create mode 100644 sound/soc/ralink/Makefile
18 create mode 100644 sound/soc/ralink/mt7620-i2s.c
19 create mode 100644 sound/soc/ralink/mt7620-wm8960.c
21 --- a/arch/mips/ralink/of.c
22 +++ b/arch/mips/ralink/of.c
24 #include <linux/of_fdt.h>
25 #include <linux/kernel.h>
26 #include <linux/bootmem.h>
27 +#include <linux/module.h>
28 #include <linux/of_platform.h>
29 #include <linux/of_address.h>
34 __iomem void *rt_sysc_membase;
35 +EXPORT_SYMBOL(rt_sysc_membase);
36 __iomem void *rt_memc_membase;
38 __iomem void *plat_of_remap_node(const char *node)
39 --- a/sound/soc/Kconfig
40 +++ b/sound/soc/Kconfig
41 @@ -56,6 +56,7 @@ source "sound/soc/mxs/Kconfig"
42 source "sound/soc/pxa/Kconfig"
43 source "sound/soc/qcom/Kconfig"
44 source "sound/soc/rockchip/Kconfig"
45 +source "sound/soc/ralink/Kconfig"
46 source "sound/soc/samsung/Kconfig"
47 source "sound/soc/sh/Kconfig"
48 source "sound/soc/sirf/Kconfig"
49 --- a/sound/soc/Makefile
50 +++ b/sound/soc/Makefile
51 @@ -36,6 +36,7 @@ obj-$(CONFIG_SND_SOC) += kirkwood/
52 obj-$(CONFIG_SND_SOC) += pxa/
53 obj-$(CONFIG_SND_SOC) += qcom/
54 obj-$(CONFIG_SND_SOC) += rockchip/
55 +obj-$(CONFIG_SND_SOC) += ralink/
56 obj-$(CONFIG_SND_SOC) += samsung/
57 obj-$(CONFIG_SND_SOC) += sh/
58 obj-$(CONFIG_SND_SOC) += sirf/
60 +++ b/sound/soc/ralink/Kconfig
62 +config SND_MT7620_SOC_I2S
63 + depends on SOC_MT7620 && SND_SOC
64 + select SND_SOC_GENERIC_DMAENGINE_PCM
65 + tristate "SoC Audio (I2S protocol) for Ralink MT7620 SoC"
67 + Say Y if you want to use I2S protocol and I2S codec on Ingenic MT7620
70 +config SND_MT7620_SOC_WM8960
71 + tristate "SoC Audio support for Ralink WM8960"
72 + select SND_MT7620_SOC_I2S
73 + select SND_SOC_WM8960
75 + Say Y if you want to add support for ASoC audio on the Qi LB60 board
76 + a.k.a Qi Ben NanoNote.
78 +++ b/sound/soc/ralink/Makefile
81 +# Jz4740 Platform Support
83 +snd-soc-mt7620-i2s-objs := mt7620-i2s.o
85 +obj-$(CONFIG_SND_MT7620_SOC_I2S) += snd-soc-mt7620-i2s.o
87 +# Jz4740 Machine Support
88 +snd-soc-mt7620-wm8960-objs := mt7620-wm8960.o
90 +obj-$(CONFIG_SND_MT7620_SOC_WM8960) += snd-soc-mt7620-wm8960.o
92 +++ b/sound/soc/ralink/mt7620-i2s.c
95 + * Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
97 + * This program is free software; you can redistribute it and/or modify it
98 + * under the terms of the GNU General Public License as published by the
99 + * Free Software Foundation; either version 2 of the License, or (at your
100 + * option) any later version.
102 + * You should have received a copy of the GNU General Public License along
103 + * with this program; if not, write to the Free Software Foundation, Inc.,
104 + * 675 Mass Ave, Cambridge, MA 02139, USA.
108 +#include <linux/init.h>
109 +#include <linux/io.h>
110 +#include <linux/kernel.h>
111 +#include <linux/module.h>
112 +#include <linux/platform_device.h>
113 +#include <linux/slab.h>
115 +#include <linux/delay.h>
117 +#include <linux/dma-mapping.h>
119 +#include <sound/core.h>
120 +#include <sound/pcm.h>
121 +#include <sound/pcm_params.h>
122 +#include <sound/soc.h>
123 +#include <sound/initval.h>
124 +#include <sound/dmaengine_pcm.h>
126 +#include <ralink_regs.h>
128 +#define I2S_REG_CFG0 0x00
129 +#define I2S_REG_CFG0_EN BIT(31)
130 +#define I2S_REG_CFG0_DMA_EN BIT(30)
131 +#define I2S_REG_CFG0_BYTE_SWAP BIT(28)
132 +#define I2S_REG_CFG0_TX_EN BIT(24)
133 +#define I2S_REG_CFG0_RX_EN BIT(20)
134 +#define I2S_REG_CFG0_SLAVE BIT(16)
135 +#define I2S_REG_CFG0_RX_THRES 12
136 +#define I2S_REG_CFG0_TX_THRES 4
137 +#define I2S_REG_CFG0_DFT_THRES (4 << I2S_REG_CFG0_RX_THRES) | \
138 + (4 << I2S_REG_CFG0_TX_THRES)
140 +#define I2S_REG_INT_STATUS 0x04
141 +#define I2S_REG_INT_EN 0x08
142 +#define I2S_REG_FF_STATUS 0x0c
143 +#define I2S_REG_WREG 0x10
144 +#define I2S_REG_RREG 0x14
145 +#define I2S_REG_CFG1 0x18
147 +#define I2S_REG_DIVCMP 0x20
148 +#define I2S_REG_DIVINT 0x24
149 +#define I2S_REG_CLK_EN BIT(31)
152 + struct resource *mem;
153 + void __iomem *base;
154 + dma_addr_t phys_base;
156 + struct snd_dmaengine_dai_dma_data playback_dma_data;
157 + struct snd_dmaengine_dai_dma_data capture_dma_data;
160 +static inline uint32_t mt7620_i2s_read(const struct mt7620_i2s *i2s,
163 + return readl(i2s->base + reg);
166 +static inline void mt7620_i2s_write(const struct mt7620_i2s *i2s,
167 + unsigned int reg, uint32_t value)
169 + //printk("i2s --> %p = 0x%08X\n", i2s->base + reg, value);
170 + writel(value, i2s->base + reg);
173 +static int mt7620_i2s_startup(struct snd_pcm_substream *substream,
174 + struct snd_soc_dai *dai)
176 + struct mt7620_i2s *i2s = snd_soc_dai_get_drvdata(dai);
182 + cfg = mt7620_i2s_read(i2s, I2S_REG_CFG0);
183 + cfg |= I2S_REG_CFG0_EN;
184 + mt7620_i2s_write(i2s, I2S_REG_CFG0, cfg);
189 +static void mt7620_i2s_shutdown(struct snd_pcm_substream *substream,
190 + struct snd_soc_dai *dai)
192 + struct mt7620_i2s *i2s = snd_soc_dai_get_drvdata(dai);
198 + cfg = mt7620_i2s_read(i2s, I2S_REG_CFG0);
199 + cfg &= ~I2S_REG_CFG0_EN;
200 + mt7620_i2s_write(i2s, I2S_REG_CFG0, cfg);
203 +static int mt7620_i2s_trigger(struct snd_pcm_substream *substream, int cmd,
204 + struct snd_soc_dai *dai)
206 + struct mt7620_i2s *i2s = snd_soc_dai_get_drvdata(dai);
211 + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
212 + mask = I2S_REG_CFG0_TX_EN;
214 + mask = I2S_REG_CFG0_RX_EN;
216 + cfg = mt7620_i2s_read(i2s, I2S_REG_CFG0);
219 + case SNDRV_PCM_TRIGGER_START:
220 + case SNDRV_PCM_TRIGGER_RESUME:
221 + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
224 + case SNDRV_PCM_TRIGGER_STOP:
225 + case SNDRV_PCM_TRIGGER_SUSPEND:
226 + case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
233 + if (cfg & (I2S_REG_CFG0_TX_EN | I2S_REG_CFG0_RX_EN))
234 + cfg |= I2S_REG_CFG0_DMA_EN;
236 + cfg &= ~I2S_REG_CFG0_DMA_EN;
238 + mt7620_i2s_write(i2s, I2S_REG_CFG0, cfg);
243 +static int mt7620_i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
245 + struct mt7620_i2s *i2s = snd_soc_dai_get_drvdata(dai);
248 + cfg = mt7620_i2s_read(i2s, I2S_REG_CFG0);
250 + switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
251 + case SND_SOC_DAIFMT_CBS_CFS:
252 + cfg |= I2S_REG_CFG0_SLAVE;
254 + case SND_SOC_DAIFMT_CBM_CFM:
255 + cfg &= ~I2S_REG_CFG0_SLAVE;
257 + case SND_SOC_DAIFMT_CBM_CFS:
262 + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
263 + case SND_SOC_DAIFMT_I2S:
264 + case SND_SOC_DAIFMT_MSB:
265 + cfg &= ~I2S_REG_CFG0_BYTE_SWAP;
267 + case SND_SOC_DAIFMT_LSB:
268 + cfg |= I2S_REG_CFG0_BYTE_SWAP;
274 + switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
275 + case SND_SOC_DAIFMT_NB_NF:
281 + mt7620_i2s_write(i2s, I2S_REG_CFG0, cfg);
286 +static int mt7620_i2s_hw_params(struct snd_pcm_substream *substream,
287 + struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
293 +unsigned long i2sMaster_inclk_int[11] = {
294 + 78, 56, 52, 39, 28, 26, 19, 14, 13, 9, 6};
295 +unsigned long i2sMaster_inclk_comp[11] = {
296 + 64, 352, 42, 32, 176, 21, 272, 88, 10, 455, 261};
299 +static int mt7620_i2s_set_sysclk(struct snd_soc_dai *dai, int clk_id,
300 + unsigned int freq, int dir)
302 + struct mt7620_i2s *i2s = snd_soc_dai_get_drvdata(dai);
304 + printk("Internal REFCLK with fractional division\n");
306 + mt7620_i2s_write(i2s, I2S_REG_DIVINT, i2sMaster_inclk_int[7]);
307 + mt7620_i2s_write(i2s, I2S_REG_DIVCMP,
308 + i2sMaster_inclk_comp[7] | I2S_REG_CLK_EN);
310 +/* struct mt7620_i2s *i2s = snd_soc_dai_get_drvdata(dai);
311 + struct clk *parent;
315 + case JZ4740_I2S_CLKSRC_EXT:
316 + parent = clk_get(NULL, "ext");
317 + clk_set_parent(i2s->clk_i2s, parent);
319 + case JZ4740_I2S_CLKSRC_PLL:
320 + parent = clk_get(NULL, "pll half");
321 + clk_set_parent(i2s->clk_i2s, parent);
322 + ret = clk_set_rate(i2s->clk_i2s, freq);
333 +static void mt7620_i2c_init_pcm_config(struct mt7620_i2s *i2s)
335 + struct snd_dmaengine_dai_dma_data *dma_data;
338 + dma_data = &i2s->playback_dma_data;
339 + dma_data->maxburst = 16;
340 + dma_data->slave_id = 2; //JZ4740_DMA_TYPE_AIC_TRANSMIT;
341 + dma_data->addr = i2s->phys_base + I2S_REG_WREG;
344 + dma_data = &i2s->capture_dma_data;
345 + dma_data->maxburst = 16;
346 + dma_data->slave_id = 3; //JZ4740_DMA_TYPE_AIC_RECEIVE;
347 + dma_data->addr = i2s->phys_base + I2S_REG_RREG;
350 +static int mt7620_i2s_dai_probe(struct snd_soc_dai *dai)
352 + struct mt7620_i2s *i2s = snd_soc_dai_get_drvdata(dai);
355 + mt7620_i2c_init_pcm_config(i2s);
356 + dai->playback_dma_data = &i2s->playback_dma_data;
357 + dai->capture_dma_data = &i2s->capture_dma_data;
359 + /* set share pins to i2s/gpio mode and i2c mode */
360 + data = rt_sysc_r32(0x60);
361 + data &= 0xFFFFFFE2;
362 + data |= 0x00000018;
363 + rt_sysc_w32(data, 0x60);
365 + printk("Internal REFCLK with fractional division\n");
367 + mt7620_i2s_write(i2s, I2S_REG_CFG0, I2S_REG_CFG0_DFT_THRES);
368 + mt7620_i2s_write(i2s, I2S_REG_CFG1, 0);
369 + mt7620_i2s_write(i2s, I2S_REG_INT_EN, 0);
371 + mt7620_i2s_write(i2s, I2S_REG_DIVINT, i2sMaster_inclk_int[7]);
372 + mt7620_i2s_write(i2s, I2S_REG_DIVCMP,
373 + i2sMaster_inclk_comp[7] | I2S_REG_CLK_EN);
378 +static int mt7620_i2s_dai_remove(struct snd_soc_dai *dai)
383 +static const struct snd_soc_dai_ops mt7620_i2s_dai_ops = {
384 + .startup = mt7620_i2s_startup,
385 + .shutdown = mt7620_i2s_shutdown,
386 + .trigger = mt7620_i2s_trigger,
387 + .hw_params = mt7620_i2s_hw_params,
388 + .set_fmt = mt7620_i2s_set_fmt,
389 + .set_sysclk = mt7620_i2s_set_sysclk,
392 +#define JZ4740_I2S_FMTS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
393 + SNDRV_PCM_FMTBIT_S24_LE)
395 +static struct snd_soc_dai_driver mt7620_i2s_dai = {
396 + .probe = mt7620_i2s_dai_probe,
397 + .remove = mt7620_i2s_dai_remove,
401 + .rates = SNDRV_PCM_RATE_8000_48000,
402 + .formats = JZ4740_I2S_FMTS,
407 + .rates = SNDRV_PCM_RATE_8000_48000,
408 + .formats = JZ4740_I2S_FMTS,
410 + .symmetric_rates = 1,
411 + .ops = &mt7620_i2s_dai_ops,
414 +static const struct snd_pcm_hardware mt7620_pcm_hardware = {
415 + .info = SNDRV_PCM_INFO_MMAP |
416 + SNDRV_PCM_INFO_MMAP_VALID |
417 + SNDRV_PCM_INFO_INTERLEAVED |
418 + SNDRV_PCM_INFO_BLOCK_TRANSFER,
419 + .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8,
420 + .period_bytes_min = PAGE_SIZE,
421 + .period_bytes_max = 64 * 1024,
423 + .periods_max = 128,
424 + .buffer_bytes_max = 128 * 1024,
428 +static const struct snd_dmaengine_pcm_config mt7620_dmaengine_pcm_config = {
429 + .prepare_slave_config = snd_dmaengine_pcm_prepare_slave_config,
430 + .pcm_hardware = &mt7620_pcm_hardware,
431 + .prealloc_buffer_size = 256 * PAGE_SIZE,
434 +static const struct snd_soc_component_driver mt7620_i2s_component = {
435 + .name = "mt7620-i2s",
438 +static int mt7620_i2s_dev_probe(struct platform_device *pdev)
440 + struct mt7620_i2s *i2s;
443 + snd_dmaengine_pcm_register(&pdev->dev,
444 + &mt7620_dmaengine_pcm_config,
445 + SND_DMAENGINE_PCM_FLAG_COMPAT);
447 + i2s = kzalloc(sizeof(*i2s), GFP_KERNEL);
451 + i2s->mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
457 + i2s->mem = request_mem_region(i2s->mem->start, resource_size(i2s->mem),
464 + i2s->base = ioremap_nocache(i2s->mem->start, resource_size(i2s->mem));
467 + goto err_release_mem_region;
470 + i2s->phys_base = i2s->mem->start;
472 + platform_set_drvdata(pdev, i2s);
473 + ret = snd_soc_register_component(&pdev->dev, &mt7620_i2s_component,
474 + &mt7620_i2s_dai, 1);
477 + dev_err(&pdev->dev, "loaded\n");
481 + dev_err(&pdev->dev, "Failed to register DAI\n");
482 + iounmap(i2s->base);
484 +err_release_mem_region:
485 + release_mem_region(i2s->mem->start, resource_size(i2s->mem));
492 +static int mt7620_i2s_dev_remove(struct platform_device *pdev)
494 + struct mt7620_i2s *i2s = platform_get_drvdata(pdev);
496 + snd_soc_unregister_component(&pdev->dev);
498 + iounmap(i2s->base);
499 + release_mem_region(i2s->mem->start, resource_size(i2s->mem));
503 + snd_dmaengine_pcm_unregister(&pdev->dev);
508 +static const struct of_device_id mt7620_i2s_match[] = {
509 + { .compatible = "ralink,mt7620a-i2s" },
512 +MODULE_DEVICE_TABLE(of, mt7620_i2s_match);
514 +static struct platform_driver mt7620_i2s_driver = {
515 + .probe = mt7620_i2s_dev_probe,
516 + .remove = mt7620_i2s_dev_remove,
518 + .name = "mt7620-i2s",
519 + .owner = THIS_MODULE,
520 + .of_match_table = mt7620_i2s_match,
524 +module_platform_driver(mt7620_i2s_driver);
526 +MODULE_AUTHOR("Lars-Peter Clausen, <lars@metafoo.de>");
527 +MODULE_DESCRIPTION("Ingenic JZ4740 SoC I2S driver");
528 +MODULE_LICENSE("GPL");
529 +MODULE_ALIAS("platform:mt7620-i2s");
531 +++ b/sound/soc/ralink/mt7620-wm8960.c
534 + * Copyright 2013 Freescale Semiconductor, Inc.
536 + * Based on mt7620-sgtl5000.c
537 + * Copyright 2012 Freescale Semiconductor, Inc.
538 + * Copyright 2012 Linaro Ltd.
540 + * The code contained herein is licensed under the GNU General Public
541 + * License. You may obtain a copy of the GNU General Public License
542 + * Version 2 or later at the following locations:
544 + * http://www.opensource.org/licenses/gpl-license.html
545 + * http://www.gnu.org/copyleft/gpl.html
548 +#include <linux/module.h>
549 +#include <linux/of_platform.h>
550 +#include <linux/i2c.h>
551 +#include <linux/slab.h>
552 +#include <sound/soc.h>
553 +#include <sound/pcm_params.h>
554 +#include <sound/soc-dapm.h>
555 +#include <linux/pinctrl/consumer.h>
557 +#include "../codecs/wm8960.h"
559 +#define DAI_NAME_SIZE 32
561 +struct mt7620_wm8960_data {
562 + struct snd_soc_dai_link dai;
563 + struct snd_soc_card card;
564 + char codec_dai_name[DAI_NAME_SIZE];
565 + char platform_name[DAI_NAME_SIZE];
566 + unsigned int clk_frequency;
569 +struct mt7620_priv {
570 + struct platform_device *pdev;
572 +static struct mt7620_priv card_priv;
574 +static const struct snd_soc_dapm_widget mt7620_wm8960_dapm_widgets[] = {
575 + SND_SOC_DAPM_HP("Headphone Jack", NULL),
576 + SND_SOC_DAPM_SPK("Ext Spk", NULL),
577 + SND_SOC_DAPM_MIC("AMIC", NULL),
578 + SND_SOC_DAPM_MIC("DMIC", NULL),
581 +static int sample_rate = 44100;
582 +static snd_pcm_format_t sample_format = SNDRV_PCM_FORMAT_S16_LE;
584 +static int mt7620_hifi_hw_params(struct snd_pcm_substream *substream,
585 + struct snd_pcm_hw_params *params)
587 + sample_rate = params_rate(params);
588 + sample_format = params_format(params);
593 +static struct snd_soc_ops mt7620_hifi_ops = {
594 + .hw_params = mt7620_hifi_hw_params,
597 +static int mt7620_wm8960_set_bias_level(struct snd_soc_card *card,
598 + struct snd_soc_dapm_context *dapm,
599 + enum snd_soc_bias_level level)
601 + struct snd_soc_dai *codec_dai = card->rtd[0].codec_dai;
602 + struct mt7620_priv *priv = &card_priv;
603 + struct mt7620_wm8960_data *data = snd_soc_card_get_drvdata(card);
604 + struct device *dev = &priv->pdev->dev;
607 + if (dapm->dev != codec_dai->dev)
611 + case SND_SOC_BIAS_PREPARE:
612 + if (dapm->bias_level == SND_SOC_BIAS_STANDBY) {
616 + case SND_SOC_BIAS_STANDBY:
617 + if (dapm->bias_level == SND_SOC_BIAS_PREPARE) {
618 + ret = snd_soc_dai_set_sysclk(codec_dai,
619 + WM8960_SYSCLK_MCLK, data->clk_frequency,
623 + "failed to switch away from FLL: %d\n",
637 +static int mt7620_wm8960_late_probe(struct snd_soc_card *card)
639 + struct snd_soc_dai *codec_dai = card->rtd[0].codec_dai;
640 + struct mt7620_priv *priv = &card_priv;
641 + struct mt7620_wm8960_data *data = snd_soc_card_get_drvdata(card);
642 + struct device *dev = &priv->pdev->dev;
645 + ret = snd_soc_dai_set_sysclk(codec_dai, WM8960_SYSCLK_MCLK,
646 + data->clk_frequency, SND_SOC_CLOCK_IN);
648 + dev_err(dev, "failed to set sysclk in %s\n", __func__);
653 +static int mt7620_wm8960_probe(struct platform_device *pdev)
655 + struct device_node *i2s_np, *codec_np;
656 + struct platform_device *i2s_pdev;
657 + struct mt7620_priv *priv = &card_priv;
658 + struct i2c_client *codec_dev;
659 + struct mt7620_wm8960_data *data;
664 + i2s_np = of_parse_phandle(pdev->dev.of_node, "i2s-controller", 0);
665 + codec_np = of_parse_phandle(pdev->dev.of_node, "audio-codec", 0);
666 + if (!i2s_np || !codec_np) {
667 + dev_err(&pdev->dev, "phandle missing or invalid\n");
672 + i2s_pdev = of_find_device_by_node(i2s_np);
674 + dev_err(&pdev->dev, "failed to find SSI platform device\n");
678 + codec_dev = of_find_i2c_device_by_node(codec_np);
679 + if (!codec_dev || !codec_dev->dev.driver) {
680 + dev_err(&pdev->dev, "failed to find codec platform device\n");
685 + data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
691 + data->clk_frequency = 12000000;
692 + data->dai.name = "HiFi";
693 + data->dai.stream_name = "HiFi";
694 + data->dai.codec_dai_name = "wm8960-hifi";
695 + data->dai.codec_of_node = codec_np;
696 + data->dai.cpu_dai_name = dev_name(&i2s_pdev->dev);
697 + data->dai.platform_of_node = i2s_np;
698 + data->dai.ops = &mt7620_hifi_ops;
699 + data->dai.dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
700 + SND_SOC_DAIFMT_CBM_CFM;
702 + data->card.dev = &pdev->dev;
703 + ret = snd_soc_of_parse_card_name(&data->card, "model");
706 + ret = snd_soc_of_parse_audio_routing(&data->card, "audio-routing");
709 + data->card.num_links = 1;
710 + data->card.dai_link = &data->dai;
711 + data->card.dapm_widgets = mt7620_wm8960_dapm_widgets;
712 + data->card.num_dapm_widgets = ARRAY_SIZE(mt7620_wm8960_dapm_widgets);
714 + data->card.late_probe = mt7620_wm8960_late_probe;
715 + data->card.set_bias_level = mt7620_wm8960_set_bias_level;
717 + platform_set_drvdata(pdev, &data->card);
718 + snd_soc_card_set_drvdata(&data->card, data);
720 + ret = devm_snd_soc_register_card(&pdev->dev, &data->card);
722 + dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n", ret);
726 + of_node_put(i2s_np);
727 + of_node_put(codec_np);
732 + of_node_put(i2s_np);
734 + of_node_put(codec_np);
739 +static int mt7620_wm8960_remove(struct platform_device *pdev)
744 +static const struct of_device_id mt7620_wm8960_dt_ids[] = {
745 + { .compatible = "mediatek,mt7620-audio-wm8960", },
748 +MODULE_DEVICE_TABLE(of, mt7620_wm8960_dt_ids);
750 +static struct platform_driver mt7620_wm8960_driver = {
752 + .name = "mt7620-wm8960",
753 + .owner = THIS_MODULE,
754 + .pm = &snd_soc_pm_ops,
755 + .of_match_table = mt7620_wm8960_dt_ids,
757 + .probe = mt7620_wm8960_probe,
758 + .remove = mt7620_wm8960_remove,
760 +module_platform_driver(mt7620_wm8960_driver);
762 +MODULE_AUTHOR("Freescale Semiconductor, Inc.");
763 +MODULE_DESCRIPTION("Freescale i.MX WM8962 ASoC machine driver");
764 +MODULE_LICENSE("GPL v2");
765 +MODULE_ALIAS("platform:mt7620-wm8962");