f358f50417f1de933aca839ee7b6b9af84b361d6
[openwrt/openwrt.git] / target / linux / realtek / dts / rtl930x.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "macros.dtsi"
4
5 /dts-v1/;
6
7 / {
8 #address-cells = <1>;
9 #size-cells = <1>;
10
11 compatible = "realtek,rtl838x-soc";
12
13 cpus {
14 #address-cells = <1>;
15 #size-cells = <0>;
16 frequency = <800000000>;
17
18 cpu@0 {
19 compatible = "mips,mips34Kc";
20 reg = <0>;
21 };
22 };
23
24 memory@0 {
25 device_type = "memory";
26 reg = <0x0 0x8000000>;
27 };
28
29 aliases {
30 serial0 = &uart0;
31 serial1 = &uart1;
32 };
33
34 chosen {
35 bootargs = "earlycon";
36 stdout-path = "serial0:115200n8";
37 };
38
39 cpuintc: cpuintc {
40 compatible = "mti,cpu-interrupt-controller";
41 #address-cells = <0>;
42 #interrupt-cells = <1>;
43 interrupt-controller;
44 };
45
46 lx_clk: lx_clk {
47 compatible = "fixed-clock";
48 #clock-cells = <0>;
49 clock-frequency = <175000000>;
50 };
51
52 soc: soc {
53 compatible = "simple-bus";
54 #address-cells = <1>;
55 #size-cells = <1>;
56 ranges = <0x0 0x18000000 0x20000>;
57
58 ecc0: ecc@1a600 {
59 compatible = "realtek,rtl9301-ecc";
60 reg = <0x1a600 0x54>;
61
62 status = "disabled";
63 };
64
65 intc: interrupt-controller@3000 {
66 compatible = "realtek,rtl9300-intc", "realtek,rtl-intc";
67 reg = <0x3000 0x18>, <0x3018 0x18>;
68 interrupt-controller;
69 #interrupt-cells = <2>;
70
71 interrupt-parent = <&cpuintc>;
72 interrupts = <2>, <3>, <4>, <5>, <6>, <7>;
73 };
74
75 snand: spi@1a400 {
76 compatible = "realtek,rtl9301-snand";
77 reg = <0x1a400 0x44>;
78 interrupt-parent = <&intc>;
79 interrupts = <19 2>;
80 clocks = <&lx_clk>;
81 #address-cells = <1>;
82 #size-cells = <0>;
83
84 status = "disabled";
85 };
86
87 spi0: spi@1200 {
88 compatible = "realtek,rtl8380-spi";
89 reg = <0x1200 0x100>;
90
91 #address-cells = <1>;
92 #size-cells = <0>;
93 };
94
95 timer0: timer@3200 {
96 compatible = "realtek,rtl930x-timer", "realtek,otto-timer";
97 reg = <0x3200 0x10>, <0x3210 0x10>, <0x3220 0x10>,
98 <0x3230 0x10>, <0x3240 0x10>;
99
100 interrupt-parent = <&intc>;
101 interrupts = <7 4>, <8 4>, <9 4>, <10 4>, <11 4>;
102 clocks = <&lx_clk>;
103 };
104
105 uart0: uart@2000 {
106 compatible = "ns16550a";
107 reg = <0x2000 0x100>;
108
109 clocks = <&lx_clk>;
110
111 interrupt-parent = <&intc>;
112 interrupts = <30 1>;
113
114 reg-io-width = <1>;
115 reg-shift = <2>;
116 fifo-size = <1>;
117 no-loopback-test;
118 };
119
120 uart1: uart@2100 {
121 compatible = "ns16550a";
122 reg = <0x2100 0x100>;
123
124 clocks = <&lx_clk>;
125
126 interrupt-parent = <&intc>;
127 interrupts = <31 0>;
128
129 reg-io-width = <1>;
130 reg-shift = <2>;
131 fifo-size = <1>;
132 no-loopback-test;
133
134 status = "disabled";
135 };
136
137 watchdog0: watchdog@3260 {
138 compatible = "realtek,rtl9300-wdt";
139 reg = <0x3260 0xc>;
140
141 realtek,reset-mode = "soc";
142
143 clocks = <&lx_clk>;
144 timeout-sec = <30>;
145
146 interrupt-parent = <&intc>;
147 interrupt-names = "phase1", "phase2";
148 interrupts = <5 4>, <6 4>;
149 };
150
151 gpio0: gpio-controller@3300 {
152 compatible = "realtek,rtl9300-gpio", "realtek,otto-gpio";
153 reg = <0x3300 0x1c>, <0x3338 0x8>;
154
155 gpio-controller;
156 #gpio-cells = <2>;
157 ngpios = <24>;
158
159 interrupt-controller;
160 #interrupt-cells = <2>;
161 interrupt-parent = <&intc>;
162 interrupts = <13 1>;
163 };
164
165 };
166
167 switchcore@1b000000 {
168 compatible = "syscon", "simple-mfd";
169 reg = <0x1b000000 0x10000>;
170 #address-cells = <1>;
171 #size-cells = <1>;
172
173 i2c_mst1: i2c@36c {
174 compatible = "realtek,rtl9301-i2c";
175 reg = <0x36c 0x18>;
176 #address-cells = <1>;
177 #size-cells = <0>;
178
179 status = "disabled";
180 };
181
182 i2c_mst2: i2c@388 {
183 compatible = "realtek,rtl9301-i2c";
184 reg = <0x388 0x18>;
185 #address-cells = <1>;
186 #size-cells = <0>;
187
188 status = "disabled";
189 };
190
191 mdio_ctrl: mdio-controller {
192 compatible = "realtek,rtl9301-mdio", "realtek,otto-mdio";
193 #address-cells = <1>;
194 #size-cells = <0>;
195
196 mdio_bus0: mdio-bus@0 {
197 reg = <0>;
198 #address-cells = <1>;
199 #size-cells = <0>;
200 };
201 };
202
203 mdio_aux: mdio-aux {
204 compatible = "realtek,rtl9300-aux-mdio";
205 #address-cells = <1>;
206 #size-cells = <0>;
207 pinctrl-0 = <&pinmux_gpio_mdio_en>;
208 pinctrl-names = "default";
209
210 status = "disabled";
211 };
212
213 mdio_serdes: mdio-serdes {
214 compatible = "realtek,rtl9301-serdes-mdio", "realtek,otto-serdes-mdio";
215 };
216
217 pcs {
218 compatible = "realtek,rtl9301-pcs", "realtek,otto-pcs";
219 #address-cells = <1>;
220 #size-cells = <0>;
221
222 serdes0: serdes@0 {
223 reg = <0>;
224 };
225 serdes1: serdes@1 {
226 reg = <1>;
227 };
228 serdes2: serdes@2 {
229 reg = <2>;
230 };
231 serdes3: serdes@3 {
232 reg = <3>;
233 };
234 serdes4: serdes@4 {
235 reg = <4>;
236 };
237 serdes5: serdes@5 {
238 reg = <5>;
239 };
240 serdes6: serdes@6 {
241 reg = <6>;
242 };
243 serdes7: serdes@7 {
244 reg = <7>;
245 };
246 serdes8: serdes@8 {
247 reg = <8>;
248 };
249 serdes9: serdes@9 {
250 reg = <9>;
251 };
252 serdes10: serdes@10 {
253 reg = <10>;
254 };
255 serdes11: serdes@11 {
256 reg = <11>;
257 };
258 };
259
260 soc_thermal: thermal {
261 compatible = "realtek,rtl9300-thermal";
262 #thermal-sensor-cells = <0>;
263 };
264 };
265
266 pinmux@1b000200 {
267 compatible = "pinctrl-single";
268 reg = <0x1b000200 0x4>;
269
270 pinctrl-single,bit-per-mux;
271 pinctrl-single,register-width = <32>;
272 pinctrl-single,function-mask = <0x1>;
273 #pinctrl-cells = <2>;
274
275 /* Enable GPIO 19 */
276 pinmux_disable_led_sync: disable-led-sync {
277 pinctrl-single,bits = <0x0 0x0 0x800>;
278 };
279
280 pinmux_enable_led_sync: enable-led-sync {
281 pinctrl-single,bits = <0x0 0x800 0x800>;
282 };
283
284 /* Enable GPIO 18 */
285 pinmux_disable_usb_led: disable-usb-led {
286 pinctrl-single,bits = <0x0 0x0 0x400>;
287 };
288
289 pinmux_enable_usb_led: enable-usb-led {
290 pinctrl-single,bits = <0x0 0x400 0x400>;
291 };
292
293 /* Disable SLV SPI CS - freeing any associated GPIOs */
294 pinmux_disable_slv_spi_cs: disable-slv-spi-cs {
295 pinctrl-single,bits = <0x0 0x0 0x3E0>;
296 };
297
298 /* Disable SLV SPI SDO - freeing any associated GPIOs */
299 pinmux_disable_slv_spi_sdo: disable-slv-spi-sdo {
300 pinctrl-single,bits = <0x0 0x0 0x1F>;
301 };
302 };
303
304 pinmux@1b00c600 {
305 compatible = "pinctrl-single";
306 reg = <0x1b00c600 0x4>;
307
308 pinctrl-single,bit-per-mux;
309 pinctrl-single,register-width = <32>;
310 pinctrl-single,function-mask = <0x1>;
311 #pinctrl-cells = <2>;
312
313 pinmux_gpio_mdio_en: gpio-mdio-en {
314 pinctrl-single,bits = <0x0 0x100 0x100>;
315 };
316 };
317
318 pinmux_led: pinmux@1b00cc00 {
319 compatible = "pinctrl-single";
320 reg = <0x1b00cc00 0x4>;
321
322 pinctrl-single,bit-per-mux;
323 pinctrl-single,register-width = <32>;
324 pinctrl-single,function-mask = <0x1>;
325 #pinctrl-cells = <2>;
326
327 /* enable GPIO 0 */
328 pinmux_disable_sys_led: disable_sys_led {
329 pinctrl-single,bits = <0x0 0x0 0x1000>;
330 };
331 };
332
333 ethernet0: ethernet@1b00a300 {
334 compatible = "realtek,rtl838x-eth";
335 reg = <0x1b00a300 0x100>;
336
337 interrupt-parent = <&intc>;
338 interrupts = <24 3>;
339
340 phy-mode = "internal";
341
342 fixed-link {
343 speed = <1000>;
344 full-duplex;
345 };
346 };
347
348 switch0: switch@1b000000 {
349 compatible = "realtek,rtl83xx-switch";
350 status = "okay";
351
352 interrupt-parent = <&intc>;
353 interrupts = <23 2>;
354 };
355
356 thermal_zones: thermal-zones {
357 cpu-thermal {
358 polling-delay-passive = <1000>;
359 polling-delay = <1000>;
360 coefficients = <1000 0>;
361 thermal-sensors = <&soc_thermal>;
362 trips {
363 critical {
364 temperature = <105000>;
365 hysteresis = <2000>;
366 type = "critical";
367 };
368 };
369 };
370 };
371 };