1 // SPDX-License-Identifier: GPL-2.0-or-later
4 #include "rtl930x.dtsi"
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/gpio/gpio.h>
10 compatible = "zyxel,xgs1250-12", "realtek,rtl838x-soc";
11 model = "Zyxel XGS1250-12 Switch";
14 compatible = "gpio-keys";
18 gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
19 linux,code = <KEY_RESTART>;
23 /* i2c of the SFP cage: port 12 */
25 compatible = "realtek,rtl9300-i2c";
26 reg = <0x1b00036c 0x3c>;
31 clock-frequency = <100000>;
36 compatible = "sff,sfp";
38 los-gpio = <&gpio0 17 GPIO_ACTIVE_HIGH>;
39 tx-fault-gpio = <&gpio0 20 GPIO_ACTIVE_HIGH>;
40 mod-def0-gpio = <&gpio0 16 GPIO_ACTIVE_LOW>;
41 tx-disable-gpio = <&gpio0 15 GPIO_ACTIVE_HIGH>;
45 compatible = "realtek,rtl9300-leds";
46 led_set0 = <0x0000 0xffff 0x0a20 0x0b80>; // LED set 0: 1000Mbps, 10/100Mbps
47 led_set1 = <0x0a0b 0x0a28 0x0a82 0x0a0b>; // LED set 1: (10G, 5G, 2.5G) (2.5G, 1G)
48 // (5G, 10/100) (10G, 5G, 2.5G)
49 led_set2 = <0x0000 0xffff 0x0a20 0x0a01>; // LED set 2: 1000MBit, 10GBit
56 compatible = "jedec,spi-nor";
58 spi-max-frequency = <10000000>;
61 compatible = "fixed-partitions";
72 reg = <0xe0000 0x10000>;
75 label = "u-boot-env2";
76 reg = <0xf0000 0x10000>;
81 reg = <0x100000 0x100000>;
85 reg = <0x200000 0x100000>;
89 reg = <0x300000 0xce0000>;
90 compatible = "openwrt,uimage", "denx,uimage";
91 openwrt,ih-magic = <0x93001250>;
95 reg = <0xfe0000 0x20000>;
103 compatible = "realtek,rtl838x-mdio";
104 regmap = <ðernet0>;
105 #address-cells = <1>;
108 /* External RTL8218D PHY */
109 phy0: ethernet-phy@0 {
111 compatible = "ethernet-phy-ieee802.3-c22";
112 rtl9300,smi-address = <0 0>;
114 // Disabled because we do not know how to bring up again
115 // reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
117 phy1: ethernet-phy@1 {
119 compatible = "ethernet-phy-ieee802.3-c22";
120 rtl9300,smi-address = <0 1>;
122 phy2: ethernet-phy@2 {
124 compatible = "ethernet-phy-ieee802.3-c22";
125 rtl9300,smi-address = <0 2>;
127 phy3: ethernet-phy@3 {
129 compatible = "ethernet-phy-ieee802.3-c22";
130 rtl9300,smi-address = <0 3>;
132 phy4: ethernet-phy@4 {
134 compatible = "ethernet-phy-ieee802.3-c22";
135 rtl9300,smi-address = <0 4>;
137 phy5: ethernet-phy@5 {
139 compatible = "ethernet-phy-ieee802.3-c22";
140 rtl9300,smi-address = <0 5>;
142 phy6: ethernet-phy@6 {
144 compatible = "ethernet-phy-ieee802.3-c22";
145 rtl9300,smi-address = <0 6>;
147 phy7: ethernet-phy@7 {
149 compatible = "ethernet-phy-ieee802.3-c22";
150 rtl9300,smi-address = <0 7>;
153 /* External Aquantia 113C PHYs */
154 phy24: ethernet-phy@24 {
156 compatible = "ethernet-phy-ieee802.3-c45";
157 rtl9300,smi-address = <1 8>;
159 // Disabled because we do not know how to bring up again
160 // reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
163 phy25: ethernet-phy@25 {
165 compatible = "ethernet-phy-ieee802.3-c45";
166 rtl9300,smi-address = <2 8>;
168 // Disabled because we do not know how to bring up again
169 // reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
172 phy26: ethernet-phy@26 {
174 compatible = "ethernet-phy-ieee802.3-c45";
175 rtl9300,smi-address = <3 8>;
177 // Disabled because we do not know how to bring up again
178 // reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
182 phy27: ethernet-phy@27 {
183 compatible = "ethernet-phy-ieee802.3-c22";
186 rtl9300,smi-address = <4 0>;
195 #address-cells = <1>;
201 phy-handle = <&phy0>;
208 phy-handle = <&phy1>;
215 phy-handle = <&phy2>;
222 phy-handle = <&phy3>;
229 phy-handle = <&phy4>;
236 phy-handle = <&phy5>;
243 phy-handle = <&phy6>;
250 phy-handle = <&phy7>;
258 phy-mode = "usxgmii";
259 phy-handle = <&phy24>;
265 phy-mode = "usxgmii";
266 phy-handle = <&phy25>;
272 phy-mode = "usxgmii";
273 phy-handle = <&phy26>;
280 phy-mode = "10gbase-r";
281 phy-handle = <&phy27>;
294 ethernet = <ðernet0>;
296 phy-mode = "internal";