1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 #include "rtl838x.dtsi"
4 #include "rtl83xx_panasonic_mxxeg-pn28xx0k.dtsi"
6 #include <dt-bindings/interrupt-controller/irq.h>
9 compatible = "panasonic,m24eg-pn28240k", "realtek,rtl8382-soc";
10 model = "Panasonic Switch-M24eG PN28240K";
13 led-boot = &led_status_eco_green;
14 led-failsafe = &led_status_eco_amber;
15 led-running = &led_status_eco_green;
16 led-upgrade = &led_status_eco_green;
20 * sfp0/1 are "combo" port with each TP port (23/24), and they are
21 * connected to the RTL8218FB. Currently, there is no support for
22 * the chip and only TP ports work by the RTL8218D support.
25 compatible = "sff,sfp";
27 tx-fault-gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
28 tx-disable-gpio = <&gpio1 1 GPIO_ACTIVE_HIGH>;
29 mod-def0-gpio = <&gpio1 2 GPIO_ACTIVE_LOW>;
30 los-gpio = <&gpio1 3 GPIO_ACTIVE_HIGH>;
34 compatible = "sff,sfp";
36 tx-fault-gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>;
37 tx-disable-gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
38 mod-def0-gpio = <&gpio1 6 GPIO_ACTIVE_LOW>;
39 los-gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
44 led_status_eco_amber: led-5 {
45 gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
46 color = <LED_COLOR_ID_AMBER>;
47 function = LED_FUNCTION_STATUS;
48 function-enumerator = <1>;
51 led_status_eco_green: led-6 {
52 gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
53 color = <LED_COLOR_ID_GREEN>;
54 function = LED_FUNCTION_STATUS;
55 function-enumerator = <2>;
60 scl-gpios = <&gpio0 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
61 sda-gpios = <&gpio0 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
65 scl-gpios = <&gpio0 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
66 sda-gpios = <&gpio0 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
71 #interrupt-cells = <2>;
72 interrupt-parent = <&gpio0>;
73 interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
76 * GPIO12 (IO1_4): RTL8218B + RTL8218FB
78 * This GPIO pin should be specified as "reset-gpio" in mdio node,
79 * but the current configuration of RTL8218B phy in the phy driver
80 * seems to be incomplete and RTL8218FB phy won't be configured on
81 * RTL8218D support. So, ethernet ports on these phys will be broken
82 * after hard-resetting.
83 * (RTL8218FB phy will be detected as RTL8218D by the phy driver)
84 * At the moment, configure this GPIO pin as gpio-hog to avoid breaking
89 gpios = <12 GPIO_ACTIVE_HIGH>;
91 line-name = "ext-switch-reset";
103 #address-cells = <1>;
111 compatible = "realtek,rtl838x-mdio";
112 #address-cells = <1>;
147 #address-cells = <1>;
150 SWITCH_PORT(0, 1, qsgmii)
151 SWITCH_PORT(1, 2, qsgmii)
152 SWITCH_PORT(2, 3, qsgmii)
153 SWITCH_PORT(3, 4, qsgmii)
154 SWITCH_PORT(4, 5, qsgmii)
155 SWITCH_PORT(5, 6, qsgmii)
156 SWITCH_PORT(6, 7, qsgmii)
157 SWITCH_PORT(7, 8, qsgmii)
159 SWITCH_PORT(8, 9, internal)
160 SWITCH_PORT(9, 10, internal)
161 SWITCH_PORT(10, 11, internal)
162 SWITCH_PORT(11, 12, internal)
163 SWITCH_PORT(12, 13, internal)
164 SWITCH_PORT(13, 14, internal)
165 SWITCH_PORT(14, 15, internal)
166 SWITCH_PORT(15, 16, internal)
168 SWITCH_PORT(16, 17, qsgmii)
169 SWITCH_PORT(17, 18, qsgmii)
170 SWITCH_PORT(18, 19, qsgmii)
171 SWITCH_PORT(19, 20, qsgmii)
172 SWITCH_PORT(20, 21, qsgmii)
173 SWITCH_PORT(21, 22, qsgmii)
174 SWITCH_PORT(22, 23, qsgmii)
175 SWITCH_PORT(23, 24, qsgmii)
178 ethernet = <ðernet0>;
180 phy-mode = "internal";