target/linux/realtek/files-5.15/drivers/clocksource/timer-rtl-otto.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <linux/clk.h>
   4 #include <linux/clockchips.h>
   5 #include <linux/cpu.h>
   6 #include <linux/cpuhotplug.h>
   7 #include <linux/interrupt.h>
   8 #include <linux/sched_clock.h>
   9
  10 #include "timer-of.h"
  11
  12 #define RTTM_DATA               0x0
  13 #define RTTM_CNT                0x4
  14 #define RTTM_CTRL               0x8
  15 #define RTTM_INT                0xc
  16
  17 #define RTTM_CTRL_ENABLE        BIT(28)
  18 #define RTTM_INT_PENDING        BIT(16)
  19 #define RTTM_INT_ENABLE         BIT(20)
  20
  21 /*
  22  * The Otto platform provides multiple 28 bit timers/counters with the following
  23  * operating logic. If enabled the timer counts up. Per timer one can set a
  24  * maximum counter value as an end marker. If end marker is reached the timer
  25  * fires an interrupt. If the timer "overflows" by reaching the end marker or
  26  * by adding 1 to 0x0fffffff the counter is reset to 0. When this happens and
  27  * the timer is in operating mode COUNTER it stops. In mode TIMER it will
  28  * continue to count up.
  29  */
  30 #define RTTM_CTRL_COUNTER       0
  31 #define RTTM_CTRL_TIMER         BIT(24)
  32
  33 #define RTTM_BIT_COUNT          28
  34 #define RTTM_MIN_DELTA          8
  35 #define RTTM_MAX_DELTA          CLOCKSOURCE_MASK(28)
  36
  37 /*
  38  * Timers are derived from the LXB clock frequency. Usually this is a fixed
  39  * multiple of the 25 MHz oscillator. The 930X SOC is an exception from that.
  40  * Its LXB clock has only dividers and uses the switch PLL of 2.45 GHz as its
  41  * base. The only meaningful frequencies we can achieve from that are 175.000
  42  * MHz and 153.125 MHz. The greatest common divisor of all explained possible
  43  * speeds is 3125000. Pin the timers to this 3.125 MHz reference frequency.
  44  */
  45 #define RTTM_TICKS_PER_SEC      3125000
  46
  47 struct rttm_cs {
  48         struct timer_of         to;
  49         struct clocksource      cs;
  50 };
  51
  52 /* Simple internal register functions */
  53 static inline void rttm_set_counter(void __iomem *base, unsigned int counter)
  54 {
  55         iowrite32(counter, base + RTTM_CNT);
  56 }
  57
  58 static inline unsigned int rttm_get_counter(void __iomem *base)
  59 {
  60         return ioread32(base + RTTM_CNT);
  61 }
  62
  63 static inline void rttm_set_period(void __iomem *base, unsigned int period)
  64 {
  65         iowrite32(period, base + RTTM_DATA);
  66 }
  67
  68 static inline void rttm_disable_timer(void __iomem *base)
  69 {
  70         iowrite32(0, base + RTTM_CTRL);
  71 }
  72
  73 static inline void rttm_enable_timer(void __iomem *base, u32 mode, u32 divisor)
  74 {
  75         iowrite32(RTTM_CTRL_ENABLE | mode | divisor, base + RTTM_CTRL);
  76 }
  77
  78 static inline void rttm_ack_irq(void __iomem *base)
  79 {
  80         iowrite32(ioread32(base + RTTM_INT) | RTTM_INT_PENDING, base + RTTM_INT);
  81 }
  82
  83 static inline void rttm_enable_irq(void __iomem *base)
  84 {
  85         iowrite32(RTTM_INT_ENABLE, base + RTTM_INT);
  86 }
  87
  88 static inline void rttm_disable_irq(void __iomem *base)
  89 {
  90         iowrite32(0, base + RTTM_INT);
  91 }
  92
  93 /* Aggregated control functions for kernel clock framework */
  94 #define RTTM_DEBUG(base)                                        \
  95         pr_debug("------------- %s %d %08x\n", __func__,        \
  96         smp_processor_id(), (u32)base)
  97
  98 static irqreturn_t rttm_timer_interrupt(int irq, void *dev_id)
  99 {
 100         struct clock_event_device *clkevt = dev_id;
 101         struct timer_of *to = to_timer_of(clkevt);
 102
 103         rttm_ack_irq(to->of_base.base);
 104         RTTM_DEBUG(to->of_base.base);
 105         clkevt->event_handler(clkevt);
 106
 107         return IRQ_HANDLED;
 108 }
 109
 110 static void rttm_stop_timer(void __iomem *base)
 111 {
 112         rttm_disable_timer(base);
 113         rttm_ack_irq(base);
 114 }
 115
 116 static void rttm_start_timer(struct timer_of *to, u32 mode)
 117 {
 118         rttm_set_counter(to->of_base.base, 0);
 119         rttm_enable_timer(to->of_base.base, mode, to->of_clk.rate / RTTM_TICKS_PER_SEC);
 120 }
 121
 122 static int rttm_next_event(unsigned long delta, struct clock_event_device *clkevt)
 123 {
 124         struct timer_of *to = to_timer_of(clkevt);
 125
 126         RTTM_DEBUG(to->of_base.base);
 127         rttm_stop_timer(to->of_base.base);
 128         rttm_set_period(to->of_base.base, delta);
 129         rttm_start_timer(to, RTTM_CTRL_COUNTER);
 130
 131         return 0;
 132 }
 133
 134 static int rttm_state_oneshot(struct clock_event_device *clkevt)
 135 {
 136         struct timer_of *to = to_timer_of(clkevt);
 137
 138         RTTM_DEBUG(to->of_base.base);
 139         rttm_stop_timer(to->of_base.base);
 140         rttm_set_period(to->of_base.base, RTTM_TICKS_PER_SEC / HZ);
 141         rttm_start_timer(to, RTTM_CTRL_COUNTER);
 142
 143         return 0;
 144 }
 145
 146 static int rttm_state_periodic(struct clock_event_device *clkevt)
 147 {
 148         struct timer_of *to = to_timer_of(clkevt);
 149
 150         RTTM_DEBUG(to->of_base.base);
 151         rttm_stop_timer(to->of_base.base);
 152         rttm_set_period(to->of_base.base, RTTM_TICKS_PER_SEC / HZ);
 153         rttm_start_timer(to, RTTM_CTRL_TIMER);
 154
 155         return 0;
 156 }
 157
 158 static int rttm_state_shutdown(struct clock_event_device *clkevt)
 159 {
 160         struct timer_of *to = to_timer_of(clkevt);
 161
 162         RTTM_DEBUG(to->of_base.base);
 163         rttm_stop_timer(to->of_base.base);
 164
 165         return 0;
 166 }
 167
 168 static void rttm_setup_timer(void __iomem *base)
 169 {
 170         RTTM_DEBUG(base);
 171         rttm_stop_timer(base);
 172         rttm_set_period(base, 0);
 173 }
 174
 175 static u64 rttm_read_clocksource(struct clocksource *cs)
 176 {
 177         struct rttm_cs *rcs = container_of(cs, struct rttm_cs, cs);
 178
 179         return (u64)rttm_get_counter(rcs->to.of_base.base);
 180 }
 181
 182 /* Module initialization part. */
 183 static DEFINE_PER_CPU(struct timer_of, rttm_to) = {
 184         .flags                          = TIMER_OF_BASE | TIMER_OF_CLOCK | TIMER_OF_IRQ,
 185         .of_irq = {
 186                 .flags                  = IRQF_PERCPU | IRQF_TIMER,
 187                 .handler                = rttm_timer_interrupt,
 188         },
 189         .clkevt = {
 190                 .rating                 = 400,
 191                 .features               = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
 192                 .set_state_periodic     = rttm_state_periodic,
 193                 .set_state_shutdown     = rttm_state_shutdown,
 194                 .set_state_oneshot      = rttm_state_oneshot,
 195                 .set_next_event         = rttm_next_event
 196         },
 197 };
 198
 199 static int rttm_enable_clocksource(struct clocksource *cs)
 200 {
 201         struct rttm_cs *rcs = container_of(cs, struct rttm_cs, cs);
 202
 203         rttm_disable_irq(rcs->to.of_base.base);
 204         rttm_setup_timer(rcs->to.of_base.base);
 205         rttm_enable_timer(rcs->to.of_base.base, RTTM_CTRL_TIMER,
 206                           rcs->to.of_clk.rate / RTTM_TICKS_PER_SEC);
 207
 208         return 0;
 209 }
 210
 211 struct rttm_cs rttm_cs = {
 212         .to = {
 213                 .flags  = TIMER_OF_BASE | TIMER_OF_CLOCK,
 214         },
 215         .cs = {
 216                 .name   = "realtek_otto_timer",
 217                 .rating = 400,
 218                 .mask   = CLOCKSOURCE_MASK(RTTM_BIT_COUNT),
 219                 .flags  = CLOCK_SOURCE_IS_CONTINUOUS,
 220                 .read   = rttm_read_clocksource,
 221         }
 222 };
 223
 224 static u64 notrace rttm_read_clock(void)
 225 {
 226         return (u64)rttm_get_counter(rttm_cs.to.of_base.base);
 227 }
 228
 229 static int rttm_cpu_starting(unsigned int cpu)
 230 {
 231         struct timer_of *to = per_cpu_ptr(&rttm_to, cpu);
 232
 233         RTTM_DEBUG(to->of_base.base);
 234         to->clkevt.cpumask = cpumask_of(cpu);
 235         irq_force_affinity(to->of_irq.irq, to->clkevt.cpumask);
 236         clockevents_config_and_register(&to->clkevt, RTTM_TICKS_PER_SEC,
 237                                         RTTM_MIN_DELTA, RTTM_MAX_DELTA);
 238         rttm_enable_irq(to->of_base.base);
 239
 240         return 0;
 241 }
 242
 243 static int __init rttm_probe(struct device_node *np)
 244 {
 245         int cpu, cpu_rollback;
 246         struct timer_of *to;
 247         int clkidx = num_possible_cpus();
 248
 249         /* Use the first n timers as per CPU clock event generators */
 250         for_each_possible_cpu(cpu) {
 251                 to = per_cpu_ptr(&rttm_to, cpu);
 252                 to->of_irq.index = to->of_base.index = cpu;
 253                 if (timer_of_init(np, to)) {
 254                         pr_err("%s: setup of timer %d failed\n", __func__, cpu);
 255                         goto rollback;
 256                 }
 257                 rttm_setup_timer(to->of_base.base);
 258         }
 259
 260         /* Activate the n'th + 1 timer as a stable CPU clocksource. */
 261         to = &rttm_cs.to;
 262         to->of_base.index = clkidx;
 263         timer_of_init(np, to);
 264         if (rttm_cs.to.of_base.base && rttm_cs.to.of_clk.rate) {
 265                 rttm_enable_clocksource(&rttm_cs.cs);
 266                 clocksource_register_hz(&rttm_cs.cs, RTTM_TICKS_PER_SEC);
 267                 sched_clock_register(rttm_read_clock, RTTM_BIT_COUNT, RTTM_TICKS_PER_SEC);
 268         } else
 269                 pr_err("%s: setup of timer %d as clocksoure failed", __func__, clkidx);
 270
 271         return cpuhp_setup_state(CPUHP_AP_REALTEK_TIMER_STARTING,
 272                                 "timer/realtek:online",
 273                                 rttm_cpu_starting, NULL);
 274 rollback:
 275         pr_err("%s: timer registration failed\n", __func__);
 276         for_each_possible_cpu(cpu_rollback) {
 277                 if (cpu_rollback == cpu)
 278                         break;
 279                 to = per_cpu_ptr(&rttm_to, cpu_rollback);
 280                 timer_of_cleanup(to);
 281         }
 282
 283         return -EINVAL;
 284 }
 285
 286 TIMER_OF_DECLARE(otto_timer, "realtek,otto-timer", rttm_probe);