1 From 0720be5371c806c1b89936984a321248fa739bea Mon Sep 17 00:00:00 2001
2 From: David Bauer <mail@david-bauer.net>
3 Date: Fri, 10 Jul 2020 15:57:46 +0200
4 Subject: [PATCH] rockchip: rk3328: Add support for FriendlyARM NanoPi R2S
6 This adds support for the NanoPi R2S from FriendlyARM.
10 Gigabit Ethernet (WAN)
11 Gigabit Ethernet (USB3) (LAN)
17 Signed-off-by: David Bauer <mail@david-bauer.net>
19 arch/arm64/boot/dts/rockchip/Makefile | 1 +
20 .../boot/dts/rockchip/rk3328-nanopi-r2s.dts | 368 ++++++++++++++++++
21 2 files changed, 369 insertions(+)
22 create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
24 --- a/arch/arm64/boot/dts/rockchip/Makefile
25 +++ b/arch/arm64/boot/dts/rockchip/Makefile
27 # SPDX-License-Identifier: GPL-2.0
28 dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb.dtb
29 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
30 +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb
31 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock64.dtb
32 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-roc-cc.dtb
33 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-evb-act8846.dtb
35 +++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
37 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
39 + * Copyright (c) 2020 David Bauer <mail@david-bauer.net>
44 +#include <dt-bindings/input/input.h>
45 +#include <dt-bindings/gpio/gpio.h>
46 +#include "rk3328.dtsi"
49 + model = "FriendlyElec NanoPi R2S";
50 + compatible = "friendlyarm,nanopi-r2s", "rockchip,rk3328";
53 + stdout-path = "serial2:1500000n8";
56 + gmac_clk: gmac-clock {
57 + compatible = "fixed-clock";
58 + clock-frequency = <125000000>;
59 + clock-output-names = "gmac_clk";
64 + compatible = "gpio-keys";
65 + pinctrl-0 = <&reset_button_pin>;
66 + pinctrl-names = "default";
70 + gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>;
71 + linux,code = <KEY_RESTART>;
72 + debounce-interval = <50>;
77 + compatible = "gpio-leds";
78 + pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>;
79 + pinctrl-names = "default";
82 + gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
83 + label = "nanopi-r2s:green:lan";
87 + gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
88 + label = "nanopi-r2s:red:sys";
92 + gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>;
93 + label = "nanopi-r2s:green:wan";
97 + vcc_io_sdio: sdmmcio-regulator {
98 + compatible = "regulator-gpio";
100 + gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>;
101 + pinctrl-0 = <&sdio_vcc_pin>;
102 + pinctrl-names = "default";
103 + regulator-name = "vcc_io_sdio";
104 + regulator-always-on;
105 + regulator-min-microvolt = <1800000>;
106 + regulator-max-microvolt = <3300000>;
107 + regulator-settling-time-us = <5000>;
108 + regulator-type = "voltage";
109 + startup-delay-us = <2000>;
110 + states = <1800000 0x1
112 + vin-supply = <&vcc_io_33>;
115 + vcc_sd: sdmmc-regulator {
116 + compatible = "regulator-fixed";
117 + gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
118 + pinctrl-0 = <&sdmmc0m1_gpio>;
119 + pinctrl-names = "default";
120 + regulator-name = "vcc_sd";
122 + regulator-min-microvolt = <3300000>;
123 + regulator-max-microvolt = <3300000>;
124 + vin-supply = <&vcc_io_33>;
128 + compatible = "regulator-fixed";
129 + regulator-name = "vdd_5v";
130 + regulator-always-on;
132 + regulator-min-microvolt = <5000000>;
133 + regulator-max-microvolt = <5000000>;
138 + cpu-supply = <&vdd_arm>;
142 + cpu-supply = <&vdd_arm>;
146 + cpu-supply = <&vdd_arm>;
150 + cpu-supply = <&vdd_arm>;
154 + assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
155 + assigned-clock-parents = <&gmac_clk>, <&gmac_clk>;
156 + clock_in_out = "input";
157 + phy-handle = <&rtl8211e>;
158 + phy-mode = "rgmii";
159 + phy-supply = <&vcc_io_33>;
160 + pinctrl-0 = <&rgmiim1_pins>;
161 + pinctrl-names = "default";
168 + compatible = "snps,dwmac-mdio";
169 + #address-cells = <1>;
172 + rtl8211e: ethernet-phy@1 {
174 + pinctrl-0 = <ð_phy_reset_pin>;
175 + pinctrl-names = "default";
176 + reset-assert-us = <10000>;
177 + reset-deassert-us = <50000>;
178 + reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
187 + compatible = "rockchip,rk805";
189 + interrupt-parent = <&gpio1>;
190 + interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
191 + #clock-cells = <1>;
192 + clock-output-names = "xin32k", "rk805-clkout2";
195 + pinctrl-0 = <&pmic_int_l>;
196 + pinctrl-names = "default";
197 + rockchip,system-power-controller;
200 + vcc1-supply = <&vdd_5v>;
201 + vcc2-supply = <&vdd_5v>;
202 + vcc3-supply = <&vdd_5v>;
203 + vcc4-supply = <&vdd_5v>;
204 + vcc5-supply = <&vcc_io_33>;
205 + vcc6-supply = <&vdd_5v>;
208 + vdd_log: DCDC_REG1 {
209 + regulator-name = "vdd_log";
210 + regulator-always-on;
212 + regulator-min-microvolt = <712500>;
213 + regulator-max-microvolt = <1450000>;
214 + regulator-ramp-delay = <12500>;
216 + regulator-state-mem {
217 + regulator-on-in-suspend;
218 + regulator-suspend-microvolt = <1000000>;
222 + vdd_arm: DCDC_REG2 {
223 + regulator-name = "vdd_arm";
224 + regulator-always-on;
226 + regulator-min-microvolt = <712500>;
227 + regulator-max-microvolt = <1450000>;
228 + regulator-ramp-delay = <12500>;
230 + regulator-state-mem {
231 + regulator-on-in-suspend;
232 + regulator-suspend-microvolt = <950000>;
236 + vcc_ddr: DCDC_REG3 {
237 + regulator-name = "vcc_ddr";
238 + regulator-always-on;
241 + regulator-state-mem {
242 + regulator-on-in-suspend;
246 + vcc_io_33: DCDC_REG4 {
247 + regulator-name = "vcc_io_33";
248 + regulator-always-on;
250 + regulator-min-microvolt = <3300000>;
251 + regulator-max-microvolt = <3300000>;
253 + regulator-state-mem {
254 + regulator-on-in-suspend;
255 + regulator-suspend-microvolt = <3300000>;
260 + regulator-name = "vcc_18";
261 + regulator-always-on;
263 + regulator-min-microvolt = <1800000>;
264 + regulator-max-microvolt = <1800000>;
266 + regulator-state-mem {
267 + regulator-on-in-suspend;
268 + regulator-suspend-microvolt = <1800000>;
272 + vcc18_emmc: LDO_REG2 {
273 + regulator-name = "vcc18_emmc";
274 + regulator-always-on;
276 + regulator-min-microvolt = <1800000>;
277 + regulator-max-microvolt = <1800000>;
279 + regulator-state-mem {
280 + regulator-on-in-suspend;
281 + regulator-suspend-microvolt = <1800000>;
286 + regulator-name = "vdd_10";
287 + regulator-always-on;
289 + regulator-min-microvolt = <1000000>;
290 + regulator-max-microvolt = <1000000>;
292 + regulator-state-mem {
293 + regulator-on-in-suspend;
294 + regulator-suspend-microvolt = <1000000>;
302 + pmuio-supply = <&vcc_io_33>;
303 + vccio1-supply = <&vcc_io_33>;
304 + vccio2-supply = <&vcc18_emmc>;
305 + vccio3-supply = <&vcc_io_sdio>;
306 + vccio4-supply = <&vcc_18>;
307 + vccio5-supply = <&vcc_io_33>;
308 + vccio6-supply = <&vcc_io_33>;
314 + reset_button_pin: reset-button-pin {
315 + rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
320 + eth_phy_reset_pin: eth-phy-reset-pin {
321 + rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
326 + lan_led_pin: lan-led-pin {
327 + rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
330 + sys_led_pin: sys-led-pin {
331 + rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
334 + wan_led_pin: wan-led-pin {
335 + rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
340 + pmic_int_l: pmic-int-l {
341 + rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>;
346 + sdio_vcc_pin: sdio-vcc-pin {
347 + rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
360 + pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>;
361 + pinctrl-names = "default";
366 + vmmc-supply = <&vcc_sd>;
367 + vqmmc-supply = <&vcc_io_sdio>;
372 + rockchip,hw-tshut-mode = <0>;
373 + rockchip,hw-tshut-polarity = <0>;