1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
5 #define STRINGIZE(s) #s
6 #define LAN_LABEL(p, s) STRINGIZE(p ## s)
7 #define SWITCH_PORT_LABEL(n) LAN_LABEL(lan, n)
9 #define INTERNAL_PHY(n) \
10 phy##n: ethernet-phy@##n { \
12 compatible = "ethernet-phy-ieee802.3-c22"; \
16 #define EXTERNAL_PHY(n) \
17 phy##n: ethernet-phy@##n { \
19 compatible = "ethernet-phy-ieee802.3-c22"; \
22 #define EXTERNAL_SFP_PHY(n) \
23 phy##n: ethernet-phy@##n { \
24 compatible = "ethernet-phy-ieee802.3-c22"; \
30 #define SWITCH_PORT(n, s, m) \
33 label = SWITCH_PORT_LABEL(s) ; \
34 phy-handle = <&phy##n>; \
42 compatible = "realtek,rtl838x-soc";
47 frequency = <500000000>;
50 compatible = "mips,mips4KEc";
56 device_type = "memory";
57 reg = <0x0 0x8000000>;
61 bootargs = "console=ttyS0,38400";
66 #interrupt-cells = <1>;
68 compatible = "rtl838x,icu";
69 reg = <0xb8003000 0x20>;
75 compatible = "realtek,rtl838x-nor";
76 reg = <0xb8001200 0x100>;
82 uart0: uart@b8002000 {
85 compatible = "ns16550a";
86 reg = <0xb8002000 0x100>;
88 clock-frequency = <200000000>;
90 interrupt-parent = <&cpuintc>;
99 uart1: uart@b8002100 {
102 compatible = "ns16550a";
103 reg = <0xb8002100 0x100>;
105 clock-frequency = <200000000>;
107 interrupt-parent = <&cpuintc>;
116 gpio0: gpio-controller@b8003500 {
117 compatible = "realtek,rtl838x-gpio";
118 reg = <0xb8003500 0x20>;
121 interrupt-parent = <&cpuintc>;
125 ethernet0: ethernet@bb00a300 {
128 compatible = "realtek,rtl838x-eth";
129 reg = <0xbb00a300 0x100>;
130 interrupt-parent = <&cpuintc>;
132 #interrupt-cells = <1>;
133 phy-mode = "internal";
141 switch0: switch@bb000000 {
144 compatible = "realtek,rtl838x-switch";