sunxi: driver refresh for 3.13 - update gmac / mmc / usb / ahci drivers to follow...
[openwrt/openwrt.git] / target / linux / sunxi / patches-3.13 / 173-6-dt-sun7i-fixup-mmc.patch
1 From e48e7ba7f97e883a24036df04cb474cf7cd22574 Mon Sep 17 00:00:00 2001
2 From: Hans de Goede <hdegoede@redhat.com>
3 Date: Mon, 17 Feb 2014 17:16:08 +0100
4 Subject: [PATCH] ARM: sun7i: dt: Fixup mmc bindings
5
6 1) Now that we're no longer overriding the caps set by mmc_of_parse we need
7 to set cd-inverted for our card detection to work.
8
9 2) Now that we no longer claim UHS modes support we will never use any DDR
10 modes, so drive-strength 2 is enough for the mmc data pins.
11
12 Signed-off-by: Hans de Goede <hdegoede@redhat.com>
13 ---
14 arch/arm/boot/dts/sun7i-a20.dtsi | 8 ++++++--
15 1 file changed, 6 insertions(+), 2 deletions(-)
16
17 diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
18 index 3bc6ac5..f4ecd79 100644
19 --- a/arch/arm/boot/dts/sun7i-a20.dtsi
20 +++ b/arch/arm/boot/dts/sun7i-a20.dtsi
21 @@ -399,6 +399,7 @@
22 clock-names = "ahb", "mod";
23 interrupts = <0 32 4>;
24 bus-width = <4>;
25 + cd-inverted;
26 status = "disabled";
27 };
28
29 @@ -409,6 +410,7 @@
30 clock-names = "ahb", "mod";
31 interrupts = <0 33 4>;
32 bus-width = <4>;
33 + cd-inverted;
34 status = "disabled";
35 };
36
37 @@ -419,6 +421,7 @@
38 clock-names = "ahb", "mod";
39 interrupts = <0 34 4>;
40 bus-width = <4>;
41 + cd-inverted;
42 status = "disabled";
43 };
44
45 @@ -429,6 +432,7 @@
46 clock-names = "ahb", "mod";
47 interrupts = <0 35 4>;
48 bus-width = <4>;
49 + cd-inverted;
50 status = "disabled";
51 };
52
53 @@ -554,7 +558,7 @@
54 mmc0_pins_a: mmc0@0 {
55 allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5";
56 allwinner,function = "mmc0";
57 - allwinner,drive = <3>;
58 + allwinner,drive = <2>;
59 allwinner,pull = <0>;
60 };
61
62 @@ -568,7 +572,7 @@
63 mmc3_pins_a: mmc3@0 {
64 allwinner,pins = "PI4","PI5","PI6","PI7","PI8","PI9";
65 allwinner,function = "mmc3";
66 - allwinner,drive = <3>;
67 + allwinner,drive = <2>;
68 allwinner,pull = <0>;
69 };
70 };
71 --
72 1.8.5.5
73