1 From 4b236a0fe51259ccde06aed046fe20bfe6e25dce Mon Sep 17 00:00:00 2001
2 From: Corentin Labbe <clabbe.montjoie@gmail.com>
3 Date: Tue, 31 Oct 2017 09:19:10 +0100
4 Subject: [PATCH] arm: dts: sunxi: h3/h5: Restore EMAC changes
6 The original dwmac-sun8i DT bindings have some issue on how to handle
7 integrated PHY and was reverted in last RC of 4.13.
8 But now we have a solution so we need to get back that was reverted.
10 This patch restore sunxi-h3-h5.dtsi
11 This reverts partially commit fe45174b72ae ("arm: dts: sunxi: Revert EMAC changes")
13 Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
14 Acked-by: Florian Fainelli <f.fainelli@gmail.com>
15 Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
17 arch/arm/boot/dts/sunxi-h3-h5.dtsi | 26 ++++++++++++++++++++++++++
18 1 file changed, 26 insertions(+)
20 --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
21 +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
26 + emac: ethernet@1c30000 {
27 + compatible = "allwinner,sun8i-h3-emac";
29 + reg = <0x01c30000 0x10000>;
30 + interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
31 + interrupt-names = "macirq";
32 + resets = <&ccu RST_BUS_EMAC>;
33 + reset-names = "stmmaceth";
34 + clocks = <&ccu CLK_BUS_EMAC>;
35 + clock-names = "stmmaceth";
36 + #address-cells = <1>;
38 + status = "disabled";
41 + #address-cells = <1>;
43 + int_mii_phy: ethernet-phy@1 {
44 + compatible = "ethernet-phy-ieee802.3-c22";
46 + clocks = <&ccu CLK_BUS_EPHY>;
47 + resets = <&ccu RST_BUS_EPHY>;
53 compatible = "allwinner,sun8i-h3-spi";
54 reg = <0x01c68000 0x1000>;