1 From bdfe4cebea11476d278b1b98dd0f7cdac8269d62 Mon Sep 17 00:00:00 2001
2 From: Icenowy Zheng <icenowy@aosc.io>
3 Date: Fri, 10 Nov 2017 17:26:54 +0800
4 Subject: [PATCH] arm64: allwinner: a64: add Ethernet PHY regulator for several
7 On several A64 boards the Ethernet PHY is powered by the DC1SW regulator
10 Add phy-handle property to these boards' emac node.
12 Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
13 Acked-by: Corentin LABBE <clabbe.montjoie@gmail.com>
14 Tested-by: Corentin LABBE <clabbe.montjoie@gmail.com>
15 Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
17 arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 1 +
18 arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 1 +
19 arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts | 1 +
20 3 files changed, 3 insertions(+)
22 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
23 +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
25 pinctrl-0 = <&rgmii_pins>;
27 phy-handle = <&ext_rgmii_phy>;
28 + phy-supply = <®_dc1sw>;
32 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
33 +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
35 pinctrl-0 = <&rmii_pins>;
37 phy-handle = <&ext_rmii_phy1>;
38 + phy-supply = <®_dc1sw>;
42 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
43 +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
45 pinctrl-0 = <&rgmii_pins>;
47 phy-handle = <&ext_rgmii_phy>;
48 + phy-supply = <®_dc1sw>;