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[openwrt/openwrt.git] / target / linux / xburst / patches-2.6.34 / 051-fb.patch
1 From 4b85f4f65855e49dec6271cf35efdcee26534210 Mon Sep 17 00:00:00 2001
2 From: Lars-Peter Clausen <lars@metafoo.de>
3 Date: Sat, 24 Apr 2010 12:13:58 +0200
4 Subject: [PATCH] Add jz4740 framebuffer driver
5
6 ---
7 drivers/video/Kconfig | 9 +
8 drivers/video/Makefile | 1 +
9 drivers/video/jz4740_fb.c | 810 +++++++++++++++++++++++++++++++++++++++++++++
10 include/linux/jz4740_fb.h | 58 ++++
11 4 files changed, 878 insertions(+), 0 deletions(-)
12 create mode 100644 drivers/video/jz4740_fb.c
13 create mode 100644 include/linux/jz4740_fb.h
14
15 diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
16 index 6e16244..14647f0 100644
17 --- a/drivers/video/Kconfig
18 +++ b/drivers/video/Kconfig
19 @@ -2214,6 +2214,15 @@ config FB_BROADSHEET
20 and could also have been called by other names when coupled with
21 a bridge adapter.
22
23 +config FB_JZ4740
24 + tristate "JZ47420/JZ4740 LCD framebuffer support"
25 + depends on FB
26 + select FB_SYS_FILLRECT
27 + select FB_SYS_COPYAREA
28 + select FB_SYS_IMAGEBLIT
29 + help
30 + Framebuffer support for the JZ4720 and JZ4740 SoC.
31 +
32 source "drivers/video/omap/Kconfig"
33 source "drivers/video/omap2/Kconfig"
34
35 diff --git a/drivers/video/Makefile b/drivers/video/Makefile
36 index ddc2af2..f56a9ca 100644
37 --- a/drivers/video/Makefile
38 +++ b/drivers/video/Makefile
39 @@ -131,6 +131,7 @@ obj-$(CONFIG_FB_CARMINE) += carminefb.o
40 obj-$(CONFIG_FB_MB862XX) += mb862xx/
41 obj-$(CONFIG_FB_MSM) += msm/
42 obj-$(CONFIG_FB_NUC900) += nuc900fb.o
43 +obj-$(CONFIG_FB_JZ4740) += jz4740_fb.o
44
45 # Platform or fallback drivers go here
46 obj-$(CONFIG_FB_UVESA) += uvesafb.o
47 diff --git a/drivers/video/jz4740_fb.c b/drivers/video/jz4740_fb.c
48 new file mode 100644
49 index 0000000..53f3adb
50 --- /dev/null
51 +++ b/drivers/video/jz4740_fb.c
52 @@ -0,0 +1,810 @@
53 +/*
54 + * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
55 + * JZ4720/JZ4740 SoC LCD framebuffer driver
56 + *
57 + * This program is free software; you can redistribute it and/or modify it
58 + * under the terms of the GNU General Public License as published by the
59 + * Free Software Foundation; either version 2 of the License, or (at your
60 + * option) any later version.
61 + *
62 + * You should have received a copy of the GNU General Public License along
63 + * with this program; if not, write to the Free Software Foundation, Inc.,
64 + * 675 Mass Ave, Cambridge, MA 02139, USA.
65 + *
66 + */
67 +
68 +#include <linux/kernel.h>
69 +#include <linux/module.h>
70 +#include <linux/mutex.h>
71 +#include <linux/platform_device.h>
72 +
73 +#include <linux/clk.h>
74 +#include <linux/delay.h>
75 +
76 +#include <linux/console.h>
77 +#include <linux/fb.h>
78 +
79 +#include <linux/dma-mapping.h>
80 +
81 +#include <linux/jz4740_fb.h>
82 +#include <asm/mach-jz4740/gpio.h>
83 +
84 +#define JZ_REG_LCD_CFG 0x00
85 +#define JZ_REG_LCD_VSYNC 0x04
86 +#define JZ_REG_LCD_HSYNC 0x08
87 +#define JZ_REG_LCD_VAT 0x0C
88 +#define JZ_REG_LCD_DAH 0x10
89 +#define JZ_REG_LCD_DAV 0x14
90 +#define JZ_REG_LCD_PS 0x18
91 +#define JZ_REG_LCD_CLS 0x1C
92 +#define JZ_REG_LCD_SPL 0x20
93 +#define JZ_REG_LCD_REV 0x24
94 +#define JZ_REG_LCD_CTRL 0x30
95 +#define JZ_REG_LCD_STATE 0x34
96 +#define JZ_REG_LCD_IID 0x38
97 +#define JZ_REG_LCD_DA0 0x40
98 +#define JZ_REG_LCD_SA0 0x44
99 +#define JZ_REG_LCD_FID0 0x48
100 +#define JZ_REG_LCD_CMD0 0x4C
101 +#define JZ_REG_LCD_DA1 0x50
102 +#define JZ_REG_LCD_SA1 0x54
103 +#define JZ_REG_LCD_FID1 0x58
104 +#define JZ_REG_LCD_CMD1 0x5C
105 +
106 +#define JZ_LCD_CFG_SLCD BIT(31)
107 +#define JZ_LCD_CFG_PS_DISABLE BIT(23)
108 +#define JZ_LCD_CFG_CLS_DISABLE BIT(22)
109 +#define JZ_LCD_CFG_SPL_DISABLE BIT(21)
110 +#define JZ_LCD_CFG_REV_DISABLE BIT(20)
111 +#define JZ_LCD_CFG_HSYNCM BIT(19)
112 +#define JZ_LCD_CFG_PCLKM BIT(18)
113 +#define JZ_LCD_CFG_INV BIT(17)
114 +#define JZ_LCD_CFG_SYNC_DIR BIT(16)
115 +#define JZ_LCD_CFG_PS_POLARITY BIT(15)
116 +#define JZ_LCD_CFG_CLS_POLARITY BIT(14)
117 +#define JZ_LCD_CFG_SPL_POLARITY BIT(13)
118 +#define JZ_LCD_CFG_REV_POLARITY BIT(12)
119 +#define JZ_LCD_CFG_HSYNC_ACTIVE_LOW BIT(11)
120 +#define JZ_LCD_CFG_PCLK_FALLING_EDGE BIT(10)
121 +#define JZ_LCD_CFG_DE_ACTIVE_LOW BIT(9)
122 +#define JZ_LCD_CFG_VSYNC_ACTIVE_LOW BIT(8)
123 +#define JZ_LCD_CFG_18_BIT BIT(7)
124 +#define JZ_LCD_CFG_PDW (BIT(5) | BIT(4))
125 +#define JZ_LCD_CFG_MODE_MASK 0xf
126 +
127 +#define JZ_LCD_CTRL_BURST_4 (0x0 << 28)
128 +#define JZ_LCD_CTRL_BURST_8 (0x1 << 28)
129 +#define JZ_LCD_CTRL_BURST_16 (0x2 << 28)
130 +#define JZ_LCD_CTRL_RGB555 BIT(27)
131 +#define JZ_LCD_CTRL_OFUP BIT(26)
132 +#define JZ_LCD_CTRL_FRC_GRAYSCALE_16 (0x0 << 24)
133 +#define JZ_LCD_CTRL_FRC_GRAYSCALE_4 (0x1 << 24)
134 +#define JZ_LCD_CTRL_FRC_GRAYSCALE_2 (0x2 << 24)
135 +#define JZ_LCD_CTRL_PDD_MASK (0xff << 16)
136 +#define JZ_LCD_CTRL_EOF_IRQ BIT(13)
137 +#define JZ_LCD_CTRL_SOF_IRQ BIT(12)
138 +#define JZ_LCD_CTRL_OFU_IRQ BIT(11)
139 +#define JZ_LCD_CTRL_IFU0_IRQ BIT(10)
140 +#define JZ_LCD_CTRL_IFU1_IRQ BIT(9)
141 +#define JZ_LCD_CTRL_DD_IRQ BIT(8)
142 +#define JZ_LCD_CTRL_QDD_IRQ BIT(7)
143 +#define JZ_LCD_CTRL_REVERSE_ENDIAN BIT(6)
144 +#define JZ_LCD_CTRL_LSB_FISRT BIT(5)
145 +#define JZ_LCD_CTRL_DISABLE BIT(4)
146 +#define JZ_LCD_CTRL_ENABLE BIT(3)
147 +#define JZ_LCD_CTRL_BPP_1 0x0
148 +#define JZ_LCD_CTRL_BPP_2 0x1
149 +#define JZ_LCD_CTRL_BPP_4 0x2
150 +#define JZ_LCD_CTRL_BPP_8 0x3
151 +#define JZ_LCD_CTRL_BPP_15_16 0x4
152 +#define JZ_LCD_CTRL_BPP_18_24 0x5
153 +
154 +#define JZ_LCD_CMD_SOF_IRQ BIT(15)
155 +#define JZ_LCD_CMD_EOF_IRQ BIT(16)
156 +#define JZ_LCD_CMD_ENABLE_PAL BIT(12)
157 +
158 +#define JZ_LCD_SYNC_MASK 0x3ff
159 +
160 +#define JZ_LCD_STATE_DISABLED BIT(0)
161 +
162 +struct jzfb_framedesc {
163 + uint32_t next;
164 + uint32_t addr;
165 + uint32_t id;
166 + uint32_t cmd;
167 +} __attribute__((packed));
168 +
169 +struct jzfb {
170 + struct fb_info *fb;
171 + struct platform_device *pdev;
172 + void __iomem *base;
173 + struct resource *mem;
174 + struct jz4740_fb_platform_data *pdata;
175 +
176 + size_t vidmem_size;
177 + void *vidmem;
178 + dma_addr_t vidmem_phys;
179 + struct jzfb_framedesc *framedesc;
180 + dma_addr_t framedesc_phys;
181 +
182 + struct clk *ldclk;
183 + struct clk *lpclk;
184 +
185 + unsigned is_enabled:1;
186 + struct mutex lock;
187 +
188 + uint32_t pseudo_palette[256];
189 +};
190 +
191 +static struct fb_fix_screeninfo jzfb_fix __devinitdata = {
192 + .id = "JZ4740 FB",
193 + .type = FB_TYPE_PACKED_PIXELS,
194 + .visual = FB_VISUAL_TRUECOLOR,
195 + .xpanstep = 0,
196 + .ypanstep = 0,
197 + .ywrapstep = 0,
198 + .accel = FB_ACCEL_NONE,
199 +};
200 +
201 +const static struct jz_gpio_bulk_request jz_lcd_ctrl_pins[] = {
202 + JZ_GPIO_BULK_PIN(LCD_PCLK),
203 + JZ_GPIO_BULK_PIN(LCD_HSYNC),
204 + JZ_GPIO_BULK_PIN(LCD_VSYNC),
205 + JZ_GPIO_BULK_PIN(LCD_DE),
206 + JZ_GPIO_BULK_PIN(LCD_PS),
207 + JZ_GPIO_BULK_PIN(LCD_REV),
208 +};
209 +
210 +const static struct jz_gpio_bulk_request jz_lcd_data_pins[] = {
211 + JZ_GPIO_BULK_PIN(LCD_DATA0),
212 + JZ_GPIO_BULK_PIN(LCD_DATA1),
213 + JZ_GPIO_BULK_PIN(LCD_DATA2),
214 + JZ_GPIO_BULK_PIN(LCD_DATA3),
215 + JZ_GPIO_BULK_PIN(LCD_DATA4),
216 + JZ_GPIO_BULK_PIN(LCD_DATA5),
217 + JZ_GPIO_BULK_PIN(LCD_DATA6),
218 + JZ_GPIO_BULK_PIN(LCD_DATA7),
219 + JZ_GPIO_BULK_PIN(LCD_DATA8),
220 + JZ_GPIO_BULK_PIN(LCD_DATA9),
221 + JZ_GPIO_BULK_PIN(LCD_DATA10),
222 + JZ_GPIO_BULK_PIN(LCD_DATA11),
223 + JZ_GPIO_BULK_PIN(LCD_DATA12),
224 + JZ_GPIO_BULK_PIN(LCD_DATA13),
225 + JZ_GPIO_BULK_PIN(LCD_DATA14),
226 + JZ_GPIO_BULK_PIN(LCD_DATA15),
227 + JZ_GPIO_BULK_PIN(LCD_DATA16),
228 + JZ_GPIO_BULK_PIN(LCD_DATA17),
229 +};
230 +
231 +static unsigned int jzfb_num_ctrl_pins(struct jzfb *jzfb)
232 +{
233 + unsigned int num;
234 +
235 + switch (jzfb->pdata->lcd_type) {
236 + case JZ_LCD_TYPE_GENERIC_16_BIT:
237 + num = 4;
238 + break;
239 + case JZ_LCD_TYPE_GENERIC_18_BIT:
240 + num = 4;
241 + break;
242 + case JZ_LCD_TYPE_8BIT_SERIAL:
243 + num = 3;
244 + break;
245 + default:
246 + num = 0;
247 + break;
248 + }
249 + return num;
250 +}
251 +
252 +static unsigned int jzfb_num_data_pins(struct jzfb *jzfb)
253 +{
254 + unsigned int num;
255 +
256 + switch (jzfb->pdata->lcd_type) {
257 + case JZ_LCD_TYPE_GENERIC_16_BIT:
258 + num = 16;
259 + break;
260 + case JZ_LCD_TYPE_GENERIC_18_BIT:
261 + num = 19;
262 + break;
263 + case JZ_LCD_TYPE_8BIT_SERIAL:
264 + num = 8;
265 + break;
266 + default:
267 + num = 0;
268 + break;
269 + }
270 + return num;
271 +}
272 +
273 +static int jzfb_setcolreg(unsigned regno, unsigned red, unsigned green,
274 + unsigned blue, unsigned transp, struct fb_info *fb)
275 +{
276 + if (regno >= fb->cmap.len)
277 + return -EINVAL;
278 +
279 + ((uint32_t *)fb->pseudo_palette)[regno] = red << 16 | green << 8 | blue;
280 +
281 + return 0;
282 +}
283 +
284 +static int jzfb_get_controller_bpp(struct jzfb *jzfb)
285 +{
286 + switch (jzfb->pdata->bpp) {
287 + case 18:
288 + case 24:
289 + return 32;
290 + case 15:
291 + return 16;
292 + default:
293 + return jzfb->pdata->bpp;
294 + }
295 +}
296 +
297 +static struct fb_videomode *jzfb_get_mode(struct jzfb *jzfb, struct fb_var_screeninfo *var)
298 +{
299 + size_t i;
300 + struct fb_videomode *mode = jzfb->pdata->modes;
301 +
302 + for (i = 0; i < jzfb->pdata->num_modes; ++i, ++mode) {
303 + if (mode->xres == var->xres && mode->yres == var->yres)
304 + return mode;
305 + }
306 +
307 + return NULL;
308 +}
309 +
310 +static int jzfb_check_var(struct fb_var_screeninfo *var, struct fb_info *fb)
311 +{
312 + struct jzfb *jzfb = fb->par;
313 + struct fb_videomode *mode;
314 +
315 + if (var->bits_per_pixel != jzfb_get_controller_bpp(jzfb) &&
316 + var->bits_per_pixel != jzfb->pdata->bpp)
317 + return -EINVAL;
318 +
319 + mode = jzfb_get_mode(jzfb, var);
320 + if (mode == NULL)
321 + return -EINVAL;
322 +
323 + fb_videomode_to_var(var, mode);
324 +
325 + switch (jzfb->pdata->bpp) {
326 + case 8:
327 + break;
328 + case 15:
329 + var->red.offset = 10;
330 + var->red.length = 5;
331 + var->green.offset = 6;
332 + var->green.length = 5;
333 + var->blue.offset = 0;
334 + var->blue.length = 5;
335 + break;
336 + case 16:
337 + var->red.offset = 11;
338 + var->red.length = 5;
339 + var->green.offset = 6;
340 + var->green.length = 6;
341 + var->blue.offset = 0;
342 + var->blue.length = 5;
343 + break;
344 + case 18:
345 + var->red.offset = 16;
346 + var->red.length = 6;
347 + var->green.offset = 8;
348 + var->green.length = 6;
349 + var->blue.offset = 0;
350 + var->blue.length = 6;
351 + var->bits_per_pixel = 32;
352 + break;
353 + case 32:
354 + case 24:
355 + var->transp.offset = 24;
356 + var->transp.length = 8;
357 + var->red.offset = 16;
358 + var->red.length = 8;
359 + var->green.offset = 8;
360 + var->green.length = 8;
361 + var->blue.offset = 0;
362 + var->blue.length = 8;
363 + var->bits_per_pixel = 32;
364 + break;
365 + default:
366 + break;
367 + }
368 +
369 + return 0;
370 +}
371 +
372 +static int jzfb_set_par(struct fb_info *info)
373 +{
374 + struct jzfb *jzfb = info->par;
375 + struct fb_var_screeninfo *var = &info->var;
376 + struct fb_videomode *mode;
377 + uint16_t hds, vds;
378 + uint16_t hde, vde;
379 + uint16_t ht, vt;
380 + uint32_t ctrl;
381 + uint32_t cfg;
382 + unsigned long rate;
383 +
384 + mode = jzfb_get_mode(jzfb, var);
385 + if (mode == NULL)
386 + return -EINVAL;
387 +
388 + info->mode = mode;
389 +
390 + hds = mode->hsync_len + mode->left_margin;
391 + hde = hds + mode->xres;
392 + ht = hde + mode->right_margin;
393 +
394 + vds = mode->vsync_len + mode->upper_margin;
395 + vde = vds + mode->yres;
396 + vt = vde + mode->lower_margin;
397 +
398 + ctrl = JZ_LCD_CTRL_OFUP | JZ_LCD_CTRL_BURST_16;
399 +
400 + switch (jzfb->pdata->bpp) {
401 + case 1:
402 + ctrl |= JZ_LCD_CTRL_BPP_1;
403 + break;
404 + case 2:
405 + ctrl |= JZ_LCD_CTRL_BPP_2;
406 + break;
407 + case 4:
408 + ctrl |= JZ_LCD_CTRL_BPP_4;
409 + break;
410 + case 8:
411 + ctrl |= JZ_LCD_CTRL_BPP_8;
412 + break;
413 + case 15:
414 + ctrl |= JZ_LCD_CTRL_RGB555; /* Falltrough */
415 + case 16:
416 + ctrl |= JZ_LCD_CTRL_BPP_15_16;
417 + break;
418 + case 18:
419 + case 24:
420 + case 32:
421 + ctrl |= JZ_LCD_CTRL_BPP_18_24;
422 + break;
423 + default:
424 + break;
425 + }
426 +
427 + cfg = 0;
428 + cfg |= JZ_LCD_CFG_PS_DISABLE;
429 + cfg |= JZ_LCD_CFG_CLS_DISABLE;
430 + cfg |= JZ_LCD_CFG_SPL_DISABLE;
431 + cfg |= JZ_LCD_CFG_REV_DISABLE;
432 +
433 + if (!(mode->sync & FB_SYNC_HOR_HIGH_ACT))
434 + cfg |= JZ_LCD_CFG_HSYNC_ACTIVE_LOW;
435 +
436 + if (!(mode->sync & FB_SYNC_VERT_HIGH_ACT))
437 + cfg |= JZ_LCD_CFG_VSYNC_ACTIVE_LOW;
438 +
439 + if (jzfb->pdata->pixclk_falling_edge)
440 + cfg |= JZ_LCD_CFG_PCLK_FALLING_EDGE;
441 +
442 + if (jzfb->pdata->date_enable_active_low)
443 + cfg |= JZ_LCD_CFG_DE_ACTIVE_LOW;
444 +
445 + if (jzfb->pdata->lcd_type == JZ_LCD_TYPE_GENERIC_18_BIT)
446 + cfg |= JZ_LCD_CFG_18_BIT;
447 +
448 + cfg |= jzfb->pdata->lcd_type & 0xf;
449 +
450 + if (mode->pixclock) {
451 + rate = PICOS2KHZ(mode->pixclock) * 1000;
452 + mode->refresh = rate / vt / ht;
453 + } else {
454 + if (jzfb->pdata->lcd_type == JZ_LCD_TYPE_8BIT_SERIAL)
455 + rate = mode->refresh * (vt + 2 * mode->xres) * ht;
456 + else
457 + rate = mode->refresh * vt * ht;
458 +
459 + mode->pixclock = KHZ2PICOS(rate / 1000);
460 + }
461 +
462 + mutex_lock(&jzfb->lock);
463 + if (!jzfb->is_enabled)
464 + clk_enable(jzfb->ldclk);
465 + else
466 + ctrl |= JZ_LCD_CTRL_ENABLE;
467 +
468 + writel(mode->hsync_len, jzfb->base + JZ_REG_LCD_HSYNC);
469 + writel(mode->vsync_len, jzfb->base + JZ_REG_LCD_VSYNC);
470 +
471 + writel((ht << 16) | vt, jzfb->base + JZ_REG_LCD_VAT);
472 +
473 + writel((hds << 16) | hde, jzfb->base + JZ_REG_LCD_DAH);
474 + writel((vds << 16) | vde, jzfb->base + JZ_REG_LCD_DAV);
475 +
476 + writel(cfg, jzfb->base + JZ_REG_LCD_CFG);
477 +
478 + writel(ctrl, jzfb->base + JZ_REG_LCD_CTRL);
479 +
480 + if (!jzfb->is_enabled)
481 + clk_disable(jzfb->ldclk);
482 + mutex_unlock(&jzfb->lock);
483 +
484 + clk_set_rate(jzfb->lpclk, rate);
485 + clk_set_rate(jzfb->ldclk, rate * 3);
486 +
487 + return 0;
488 +}
489 +
490 +static void jzfb_enable(struct jzfb *jzfb)
491 +{
492 + uint32_t ctrl;
493 +
494 + clk_enable(jzfb->ldclk);
495 +
496 + jz_gpio_bulk_resume(jz_lcd_ctrl_pins, jzfb_num_ctrl_pins(jzfb));
497 + jz_gpio_bulk_resume(jz_lcd_data_pins, jzfb_num_data_pins(jzfb));
498 +
499 + writel(0, jzfb->base + JZ_REG_LCD_STATE);
500 +
501 + writel(jzfb->framedesc->next, jzfb->base + JZ_REG_LCD_DA0);
502 +
503 + ctrl = readl(jzfb->base + JZ_REG_LCD_CTRL);
504 + ctrl |= JZ_LCD_CTRL_ENABLE;
505 + ctrl &= ~JZ_LCD_CTRL_DISABLE;
506 + writel(ctrl, jzfb->base + JZ_REG_LCD_CTRL);
507 +}
508 +
509 +static void jzfb_disable(struct jzfb *jzfb)
510 +{
511 + uint32_t ctrl;
512 +
513 + ctrl = readl(jzfb->base + JZ_REG_LCD_CTRL);
514 + ctrl |= JZ_LCD_CTRL_DISABLE;
515 + writel(ctrl, jzfb->base + JZ_REG_LCD_CTRL);
516 + do {
517 + ctrl = readl(jzfb->base + JZ_REG_LCD_STATE);
518 + } while (!(ctrl & JZ_LCD_STATE_DISABLED));
519 +
520 + jz_gpio_bulk_suspend(jz_lcd_ctrl_pins, jzfb_num_ctrl_pins(jzfb));
521 + jz_gpio_bulk_suspend(jz_lcd_data_pins, jzfb_num_data_pins(jzfb));
522 +
523 + clk_disable(jzfb->ldclk);
524 +}
525 +
526 +static int jzfb_blank(int blank_mode, struct fb_info *info)
527 +{
528 + struct jzfb *jzfb = info->par;
529 +
530 + switch (blank_mode) {
531 + case FB_BLANK_UNBLANK:
532 + mutex_lock(&jzfb->lock);
533 + if (jzfb->is_enabled) {
534 + mutex_unlock(&jzfb->lock);
535 + return 0;
536 + }
537 +
538 + jzfb_enable(jzfb);
539 + jzfb->is_enabled = 1;
540 +
541 + mutex_unlock(&jzfb->lock);
542 +
543 + break;
544 + default:
545 + mutex_lock(&jzfb->lock);
546 + if (!jzfb->is_enabled) {
547 + mutex_unlock(&jzfb->lock);
548 + return 0;
549 + }
550 +
551 + jzfb_disable(jzfb);
552 +
553 + jzfb->is_enabled = 0;
554 + mutex_unlock(&jzfb->lock);
555 + break;
556 + }
557 +
558 + return 0;
559 +}
560 +
561 +static int jzfb_alloc_devmem(struct jzfb *jzfb)
562 +{
563 + int max_videosize = 0;
564 + struct fb_videomode *mode = jzfb->pdata->modes;
565 + void *page;
566 + int i;
567 +
568 + for (i = 0; i < jzfb->pdata->num_modes; ++mode, ++i) {
569 + if (max_videosize < mode->xres * mode->yres)
570 + max_videosize = mode->xres * mode->yres;
571 + }
572 +
573 + max_videosize *= jzfb_get_controller_bpp(jzfb) >> 3;
574 +
575 + jzfb->framedesc = dma_alloc_coherent(&jzfb->pdev->dev,
576 + sizeof(*jzfb->framedesc),
577 + &jzfb->framedesc_phys, GFP_KERNEL);
578 +
579 + if (!jzfb->framedesc)
580 + return -ENOMEM;
581 +
582 + jzfb->vidmem_size = PAGE_ALIGN(max_videosize);
583 + jzfb->vidmem = dma_alloc_coherent(&jzfb->pdev->dev,
584 + jzfb->vidmem_size,
585 + &jzfb->vidmem_phys, GFP_KERNEL);
586 +
587 + if (!jzfb->vidmem)
588 + goto err_free_framedesc;
589 +
590 + for (page = jzfb->vidmem;
591 + page < jzfb->vidmem + PAGE_ALIGN(jzfb->vidmem_size);
592 + page += PAGE_SIZE) {
593 + SetPageReserved(virt_to_page(page));
594 + }
595 +
596 +
597 + jzfb->framedesc->next = jzfb->framedesc_phys;
598 + jzfb->framedesc->addr = jzfb->vidmem_phys;
599 + jzfb->framedesc->id = 0xdeafbead;
600 + jzfb->framedesc->cmd = 0;
601 + jzfb->framedesc->cmd |= max_videosize / 4;
602 +
603 + return 0;
604 +
605 +err_free_framedesc:
606 + dma_free_coherent(&jzfb->pdev->dev, sizeof(*jzfb->framedesc),
607 + jzfb->framedesc, jzfb->framedesc_phys);
608 + return -ENOMEM;
609 +}
610 +
611 +static void jzfb_free_devmem(struct jzfb *jzfb)
612 +{
613 + dma_free_coherent(&jzfb->pdev->dev, jzfb->vidmem_size,
614 + jzfb->vidmem, jzfb->vidmem_phys);
615 + dma_free_coherent(&jzfb->pdev->dev, sizeof(*jzfb->framedesc),
616 + jzfb->framedesc, jzfb->framedesc_phys);
617 +}
618 +
619 +static struct fb_ops jzfb_ops = {
620 + .owner = THIS_MODULE,
621 + .fb_check_var = jzfb_check_var,
622 + .fb_set_par = jzfb_set_par,
623 + .fb_blank = jzfb_blank,
624 + .fb_fillrect = sys_fillrect,
625 + .fb_copyarea = sys_copyarea,
626 + .fb_imageblit = sys_imageblit,
627 + .fb_setcolreg = jzfb_setcolreg,
628 +};
629 +
630 +static int __devinit jzfb_probe(struct platform_device *pdev)
631 +{
632 + int ret;
633 + struct jzfb *jzfb;
634 + struct fb_info *fb;
635 + struct jz4740_fb_platform_data *pdata = pdev->dev.platform_data;
636 + struct resource *mem;
637 +
638 + if (!pdata) {
639 + dev_err(&pdev->dev, "Missing platform data\n");
640 + return -ENOENT;
641 + }
642 +
643 + mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
644 +
645 + if (!mem) {
646 + dev_err(&pdev->dev, "Failed to get register memory resource\n");
647 + return -ENOENT;
648 + }
649 +
650 + mem = request_mem_region(mem->start, resource_size(mem), pdev->name);
651 +
652 + if (!mem) {
653 + dev_err(&pdev->dev, "Failed to request register memory region\n");
654 + return -EBUSY;
655 + }
656 +
657 +
658 + fb = framebuffer_alloc(sizeof(struct jzfb), &pdev->dev);
659 +
660 + if (!fb) {
661 + dev_err(&pdev->dev, "Failed to allocate framebuffer device\n");
662 + ret = -ENOMEM;
663 + goto err_release_mem_region;
664 + }
665 +
666 + fb->fbops = &jzfb_ops;
667 + fb->flags = FBINFO_DEFAULT;
668 +
669 + jzfb = fb->par;
670 + jzfb->pdev = pdev;
671 + jzfb->pdata = pdata;
672 + jzfb->mem = mem;
673 +
674 + jzfb->ldclk = clk_get(&pdev->dev, "lcd");
675 + if (IS_ERR(jzfb->ldclk)) {
676 + ret = PTR_ERR(jzfb->ldclk);
677 + dev_err(&pdev->dev, "Failed to get lcd clock: %d\n", ret);
678 + goto err_framebuffer_release;
679 + }
680 +
681 + jzfb->lpclk = clk_get(&pdev->dev, "lcd_pclk");
682 + if (IS_ERR(jzfb->lpclk)) {
683 + ret = PTR_ERR(jzfb->lpclk);
684 + dev_err(&pdev->dev, "Failed to get lcd pixel clock: %d\n", ret);
685 + goto err_put_ldclk;
686 + }
687 +
688 + jzfb->base = ioremap(mem->start, resource_size(mem));
689 +
690 + if (!jzfb->base) {
691 + dev_err(&pdev->dev, "Failed to ioremap register memory region\n");
692 + ret = -EBUSY;
693 + goto err_put_lpclk;
694 + }
695 +
696 + platform_set_drvdata(pdev, jzfb);
697 +
698 + fb_videomode_to_modelist(pdata->modes, pdata->num_modes,
699 + &fb->modelist);
700 + fb->mode = pdata->modes;
701 +
702 + fb_videomode_to_var(&fb->var, fb->mode);
703 + fb->var.bits_per_pixel = pdata->bpp;
704 + jzfb_check_var(&fb->var, fb);
705 +
706 + ret = jzfb_alloc_devmem(jzfb);
707 + if (ret) {
708 + dev_err(&pdev->dev, "Failed to allocate video memory\n");
709 + goto err_iounmap;
710 + }
711 +
712 + fb->fix = jzfb_fix;
713 + fb->fix.line_length = fb->var.bits_per_pixel * fb->var.xres / 8;
714 + fb->fix.mmio_start = mem->start;
715 + fb->fix.mmio_len = resource_size(mem);
716 + fb->fix.smem_start = jzfb->vidmem_phys;
717 + fb->fix.smem_len = fb->fix.line_length * fb->var.yres;
718 + fb->screen_base = jzfb->vidmem;
719 + fb->pseudo_palette = jzfb->pseudo_palette;
720 +
721 + fb_alloc_cmap(&fb->cmap, 256, 0);
722 +
723 + mutex_init(&jzfb->lock);
724 +
725 + clk_enable(jzfb->ldclk);
726 + jzfb->is_enabled = 1;
727 +
728 + writel(jzfb->framedesc->next, jzfb->base + JZ_REG_LCD_DA0);
729 + jzfb_set_par(fb);
730 +
731 + jz_gpio_bulk_request(jz_lcd_ctrl_pins, jzfb_num_ctrl_pins(jzfb));
732 + jz_gpio_bulk_request(jz_lcd_data_pins, jzfb_num_data_pins(jzfb));
733 +
734 + ret = register_framebuffer(fb);
735 + if (ret) {
736 + dev_err(&pdev->dev, "Failed to register framebuffer: %d\n", ret);
737 + goto err_free_devmem;
738 + }
739 +
740 + jzfb->fb = fb;
741 +
742 + return 0;
743 +
744 +err_free_devmem:
745 + jz_gpio_bulk_free(jz_lcd_ctrl_pins, jzfb_num_ctrl_pins(jzfb));
746 + jz_gpio_bulk_free(jz_lcd_data_pins, jzfb_num_data_pins(jzfb));
747 +
748 + fb_dealloc_cmap(&fb->cmap);
749 + jzfb_free_devmem(jzfb);
750 +err_iounmap:
751 + iounmap(jzfb->base);
752 +err_put_lpclk:
753 + clk_put(jzfb->lpclk);
754 +err_put_ldclk:
755 + clk_put(jzfb->ldclk);
756 +err_framebuffer_release:
757 + framebuffer_release(fb);
758 +err_release_mem_region:
759 + release_mem_region(mem->start, resource_size(mem));
760 + return ret;
761 +}
762 +
763 +static int __devexit jzfb_remove(struct platform_device *pdev)
764 +{
765 + struct jzfb *jzfb = platform_get_drvdata(pdev);
766 +
767 + jzfb_blank(FB_BLANK_POWERDOWN, jzfb->fb);
768 +
769 + jz_gpio_bulk_free(jz_lcd_ctrl_pins, jzfb_num_ctrl_pins(jzfb));
770 + jz_gpio_bulk_free(jz_lcd_data_pins, jzfb_num_data_pins(jzfb));
771 +
772 + iounmap(jzfb->base);
773 + release_mem_region(jzfb->mem->start, resource_size(jzfb->mem));
774 +
775 + fb_dealloc_cmap(&jzfb->fb->cmap);
776 + jzfb_free_devmem(jzfb);
777 +
778 + platform_set_drvdata(pdev, NULL);
779 +
780 + clk_put(jzfb->lpclk);
781 + clk_put(jzfb->ldclk);
782 +
783 + framebuffer_release(jzfb->fb);
784 +
785 + return 0;
786 +}
787 +
788 +#ifdef CONFIG_PM
789 +
790 +static int jzfb_suspend(struct device *dev)
791 +{
792 + struct jzfb *jzfb = dev_get_drvdata(dev);
793 +
794 + acquire_console_sem();
795 + fb_set_suspend(jzfb->fb, 1);
796 + release_console_sem();
797 +
798 + mutex_lock(&jzfb->lock);
799 + if (jzfb->is_enabled)
800 + jzfb_disable(jzfb);
801 + mutex_unlock(&jzfb->lock);
802 +
803 + return 0;
804 +}
805 +
806 +static int jzfb_resume(struct device *dev)
807 +{
808 + struct jzfb *jzfb = dev_get_drvdata(dev);
809 + clk_enable(jzfb->ldclk);
810 +
811 + mutex_lock(&jzfb->lock);
812 + if (jzfb->is_enabled)
813 + jzfb_enable(jzfb);
814 + mutex_unlock(&jzfb->lock);
815 +
816 + acquire_console_sem();
817 + fb_set_suspend(jzfb->fb, 0);
818 + release_console_sem();
819 +
820 + return 0;
821 +}
822 +
823 +static const struct dev_pm_ops jzfb_pm_ops = {
824 + .suspend = jzfb_suspend,
825 + .resume = jzfb_resume,
826 + .poweroff = jzfb_suspend,
827 + .restore = jzfb_resume,
828 +};
829 +
830 +#define JZFB_PM_OPS (&jzfb_pm_ops)
831 +
832 +#else
833 +#define JZFB_PM_OPS NULL
834 +#endif
835 +
836 +static struct platform_driver jzfb_driver = {
837 + .probe = jzfb_probe,
838 + .remove = __devexit_p(jzfb_remove),
839 +
840 + .driver = {
841 + .name = "jz4740-fb",
842 + .pm = JZFB_PM_OPS,
843 + },
844 +};
845 +
846 +static int __init jzfb_init(void)
847 +{
848 + return platform_driver_register(&jzfb_driver);
849 +}
850 +module_init(jzfb_init);
851 +
852 +static void __exit jzfb_exit(void)
853 +{
854 + platform_driver_unregister(&jzfb_driver);
855 +}
856 +module_exit(jzfb_exit);
857 +
858 +MODULE_LICENSE("GPL");
859 +MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
860 +MODULE_DESCRIPTION("JZ4720/JZ4740 SoC LCD framebuffer driver");
861 +MODULE_ALIAS("platform:jz4740-fb");
862 +MODULE_ALIAS("platform:jz4720-fb");
863 diff --git a/include/linux/jz4740_fb.h b/include/linux/jz4740_fb.h
864 new file mode 100644
865 index 0000000..ab4c963
866 --- /dev/null
867 +++ b/include/linux/jz4740_fb.h
868 @@ -0,0 +1,58 @@
869 +/*
870 + * Copyright (C) 2009, Lars-Peter Clausen <lars@metafoo.de>
871 + *
872 + * This program is free software; you can redistribute it and/or modify it
873 + * under the terms of the GNU General Public License as published by the
874 + * Free Software Foundation; either version 2 of the License, or (at your
875 + * option) any later version.
876 + *
877 + * You should have received a copy of the GNU General Public License along
878 + * with this program; if not, write to the Free Software Foundation, Inc.,
879 + * 675 Mass Ave, Cambridge, MA 02139, USA.
880 + *
881 + */
882 +
883 +#ifndef __LINUX_JZ4740_FB_H
884 +#define __LINUX_JZ4740_FB_H
885 +
886 +#include <linux/fb.h>
887 +
888 +enum jz4740_fb_lcd_type {
889 + JZ_LCD_TYPE_GENERIC_16_BIT = 0,
890 + JZ_LCD_TYPE_GENERIC_18_BIT = 0 | (1 << 4),
891 + JZ_LCD_TYPE_SPECIAL_TFT_1 = 1,
892 + JZ_LCD_TYPE_SPECIAL_TFT_2 = 2,
893 + JZ_LCD_TYPE_SPECIAL_TFT_3 = 3,
894 + JZ_LCD_TYPE_NON_INTERLACED_CCIR656 = 5,
895 + JZ_LCD_TYPE_INTERLACED_CCIR656 = 7,
896 + JZ_LCD_TYPE_SINGLE_COLOR_STN = 8,
897 + JZ_LCD_TYPE_SINGLE_MONOCHROME_STN = 9,
898 + JZ_LCD_TYPE_DUAL_COLOR_STN = 10,
899 + JZ_LCD_TYPE_DUAL_MONOCHROME_STN = 11,
900 + JZ_LCD_TYPE_8BIT_SERIAL = 12,
901 +};
902 +
903 +/*
904 +* width: width of the lcd display in mm
905 +* height: height of the lcd display in mm
906 +* num_modes: size of modes
907 +* modes: list of valid video modes
908 +* bpp: bits per pixel for the lcd
909 +* lcd_type: lcd type
910 +*/
911 +
912 +struct jz4740_fb_platform_data {
913 + unsigned int width;
914 + unsigned int height;
915 +
916 + size_t num_modes;
917 + struct fb_videomode *modes;
918 +
919 + unsigned int bpp;
920 + enum jz4740_fb_lcd_type lcd_type;
921 +
922 + unsigned pixclk_falling_edge:1;
923 + unsigned date_enable_active_low:1;
924 +};
925 +
926 +#endif
927 --
928 1.5.6.5
929
OpenWrt Source Repository