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ath79: convert mtd-mac-address to nvmem implementation
[openwrt/openwrt.git]
/
target
/
linux
/
ath79
/
dts
/
ar9342_ubnt_xw.dtsi
diff --git
a/target/linux/ath79/dts/ar9342_ubnt_xw.dtsi
b/target/linux/ath79/dts/ar9342_ubnt_xw.dtsi
index cf24aba5aa9c542c6312e1275cd9e6cf9a1e363a..ce49c10e5ccb5bc634444cd2dbbce1deb60ef73c 100644
(file)
--- a/
target/linux/ath79/dts/ar9342_ubnt_xw.dtsi
+++ b/
target/linux/ath79/dts/ar9342_ubnt_xw.dtsi
@@
-1,10
+1,10
@@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+#include "ar9344.dtsi"
+
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
-#include "ar9344.dtsi"
-
/ {
compatible = "ubnt,xw", "qca,ar9342";
model = "Ubiquiti Networks XW board";
/ {
compatible = "ubnt,xw", "qca,ar9342";
model = "Ubiquiti Networks XW board";
@@
-21,22
+21,22
@@
compatible = "gpio-leds";
link1 {
compatible = "gpio-leds";
link1 {
- label = "
ubnt:
red:link1";
+ label = "red:link1";
gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
};
link2 {
gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
};
link2 {
- label = "
ubnt:
orange:link2";
+ label = "orange:link2";
gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
};
link3 {
gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
};
link3 {
- label = "
ubnt:
green:link3";
+ label = "green:link3";
gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
};
led_link4: link4 {
gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
};
led_link4: link4 {
- label = "
ubnt:
green:link4";
+ label = "green:link4";
gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
};
};
gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
};
};
@@
-57,17
+57,8
@@
clock-frequency = <40000000>;
};
clock-frequency = <40000000>;
};
-&uart {
- status = "okay";
-};
-
-&gpio {
- status = "okay";
-};
-
&spi {
status = "okay";
&spi {
status = "okay";
- num-cs = <1>;
flash@0 {
compatible = "jedec,spi-nor";
flash@0 {
compatible = "jedec,spi-nor";
@@
-119,5
+110,16
@@
};
ð0 {
};
ð0 {
- mtd-mac-address = <&art 0x0>;
+ nvmem-cells = <&macaddr_art_0>;
+ nvmem-cell-names = "mac-address";
+};
+
+&art {
+ compatible = "nvmem-cells";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ macaddr_art_0: macaddr@0 {
+ reg = <0x0 0x6>;
+ };
};
};