- pre_div = 2;
-
-+ /*
-+ * Limit SD clock to 167MHz for ls1046a according to its datasheet
-+ */
-+ if (clock > 167000000 &&
-+ of_find_compatible_node(NULL, NULL, "fsl,ls1046a-esdhc"))
-+ clock = 167000000;
-+
-+ /*
-+ * Limit SD clock to 125MHz for ls1012a according to its datasheet
-+ */
-+ if (clock > 125000000 &&
-+ of_find_compatible_node(NULL, NULL, "fsl,ls1012a-esdhc"))
-+ clock = 125000000;
-+
- /* Workaround to reduce the clock frequency for p1010 esdhc */
- if (of_find_compatible_node(NULL, NULL, "fsl,p1010-esdhc")) {
- if (clock > 20000000)
-@@ -441,8 +503,8 @@ static void esdhc_of_set_clock(struct sd