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ramips: mt7620: power up ephy port 4
[openwrt/staging/mkresin.git]
/
target
/
linux
/
ramips
/
dts
/
mt7620a.dtsi
diff --git
a/target/linux/ramips/dts/mt7620a.dtsi
b/target/linux/ramips/dts/mt7620a.dtsi
index 978b88aeeacf24d7363716eb27369d30660c8760..882cf8810417e94de059cdfbcef477a0d0b98bd6 100644
(file)
--- a/
target/linux/ramips/dts/mt7620a.dtsi
+++ b/
target/linux/ramips/dts/mt7620a.dtsi
@@
-23,9
+23,10
@@
aliases {
spi0 = &spi0;
spi1 = &spi1;
aliases {
spi0 = &spi0;
spi1 = &spi1;
+ serial0 = &uartlite;
};
};
- palmbus@10000000 {
+ palmbus
: palmbus
@10000000 {
compatible = "palmbus";
reg = <0x10000000 0x200000>;
ranges = <0x0 0x10000000 0x1FFFFF>;
compatible = "palmbus";
reg = <0x10000000 0x200000>;
ranges = <0x0 0x10000000 0x1FFFFF>;
@@
-33,12
+34,12
@@
#address-cells = <1>;
#size-cells = <1>;
#address-cells = <1>;
#size-cells = <1>;
- sysc@0 {
+ sysc
: sysc
@0 {
compatible = "ralink,mt7620a-sysc", "ralink,rt3050-sysc";
reg = <0x0 0x100>;
};
compatible = "ralink,mt7620a-sysc", "ralink,rt3050-sysc";
reg = <0x0 0x100>;
};
- timer@100 {
+ timer
: timer
@100 {
compatible = "ralink,mt7620a-timer", "ralink,rt2880-timer";
reg = <0x100 0x20>;
compatible = "ralink,mt7620a-timer", "ralink,rt2880-timer";
reg = <0x100 0x20>;
@@
-46,7
+47,7
@@
interrupts = <1>;
};
interrupts = <1>;
};
- watchdog@120 {
+ watchdog
: watchdog
@120 {
compatible = "ralink,mt7620a-wdt", "ralink,rt2880-wdt";
reg = <0x120 0x10>;
compatible = "ralink,mt7620a-wdt", "ralink,rt2880-wdt";
reg = <0x120 0x10>;
@@
-71,7
+72,7
@@
interrupts = <2>;
};
interrupts = <2>;
};
- memc@300 {
+ memc
: memc
@300 {
compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
reg = <0x300 0x100>;
compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
reg = <0x300 0x100>;
@@
-82,7
+83,7
@@
interrupts = <3>;
};
interrupts = <3>;
};
- uart@500 {
+ uart
: uart
@500 {
compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
reg = <0x500 0x100>;
compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
reg = <0x500 0x100>;
@@
-174,8
+175,8
@@
status = "disabled";
};
status = "disabled";
};
- i2c@900 {
- compatible = "
link,mt7620a-i2c", "
ralink,rt2880-i2c";
+ i2c
: i2c
@900 {
+ compatible = "ralink,rt2880-i2c";
reg = <0x900 0x100>;
resets = <&rstctrl 16>;
reg = <0x900 0x100>;
resets = <&rstctrl 16>;
@@
-190,8
+191,8
@@
pinctrl-0 = <&i2c_pins>;
};
pinctrl-0 = <&i2c_pins>;
};
- i2s@a00 {
- compatible = "
ralink,mt7620a
-i2s";
+ i2s
: i2s
@a00 {
+ compatible = "
mediatek,mt7620
-i2s";
reg = <0xa00 0x100>;
resets = <&rstctrl 17>;
reg = <0xa00 0x100>;
resets = <&rstctrl 17>;
@@
-200,8
+201,11
@@
interrupt-parent = <&intc>;
interrupts = <10>;
interrupt-parent = <&intc>;
interrupts = <10>;
+ txdma-req = <2>;
+ rxdma-req = <3>;
+
dmas = <&gdma 4>,
dmas = <&gdma 4>,
- <&gdma
5
>;
+ <&gdma
6
>;
dma-names = "tx", "rx";
status = "disabled";
dma-names = "tx", "rx";
status = "disabled";
@@
-231,7
+235,7
@@
reset-names = "spi";
#address-cells = <1>;
reset-names = "spi";
#address-cells = <1>;
- #size-cells = <
1
>;
+ #size-cells = <
0
>;
status = "disabled";
status = "disabled";
@@
-239,7
+243,7
@@
pinctrl-0 = <&spi_cs1>;
};
pinctrl-0 = <&spi_cs1>;
};
- uartlite@c00 {
+ uartlite
: uartlite
@c00 {
compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
reg = <0xc00 0x100>;
compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
reg = <0xc00 0x100>;
@@
-255,7
+259,7
@@
pinctrl-0 = <&uartlite_pins>;
};
pinctrl-0 = <&uartlite_pins>;
};
- systick@d00 {
+ systick
: systick
@d00 {
compatible = "ralink,mt7620a-systick", "ralink,cevt-systick";
reg = <0xd00 0x10>;
compatible = "ralink,mt7620a-systick", "ralink,cevt-systick";
reg = <0xd00 0x10>;
@@
-266,7
+270,7
@@
interrupts = <7>;
};
interrupts = <7>;
};
- pcm@2000 {
+ pcm
: pcm
@2000 {
compatible = "ralink,mt7620a-pcm";
reg = <0x2000 0x800>;
compatible = "ralink,mt7620a-pcm";
reg = <0x2000 0x800>;
@@
-280,7
+284,7
@@
};
gdma: gdma@2800 {
};
gdma: gdma@2800 {
- compatible = "ralink,mt7620a-gdma", "ralink,rt
2880
-gdma";
+ compatible = "ralink,mt7620a-gdma", "ralink,rt
3883
-gdma";
reg = <0x2800 0x800>;
resets = <&rstctrl 14>;
reg = <0x2800 0x800>;
resets = <&rstctrl 14>;
@@
-297,7
+301,7
@@
};
};
};
};
- pinctrl {
+ pinctrl
: pinctrl
{
compatible = "ralink,rt2880-pinmux";
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
compatible = "ralink,rt2880-pinmux";
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
@@
-319,6
+323,13
@@
};
};
};
};
+ gpio_i2s_pins: gpio_i2s {
+ gpio_i2s {
+ ralink,group = "uartf";
+ ralink,function = "gpio i2s";
+ };
+ };
+
spi_pins: spi {
spi {
ralink,group = "spi";
spi_pins: spi {
spi {
ralink,group = "spi";
@@
-354,6
+365,13
@@
};
};
};
};
+ mdio_refclk_pins: mdio_refclk {
+ mdio_refclk {
+ ralink,group = "mdio";
+ ralink,function = "refclk";
+ };
+ };
+
ephy_pins: ephy {
ephy {
ralink,group = "ephy";
ephy_pins: ephy {
ephy {
ralink,group = "ephy";
@@
-388,6
+406,13
@@
ralink,function = "pcie rst";
};
};
ralink,function = "pcie rst";
};
};
+
+ pa_pins: pa {
+ pa {
+ ralink,group = "pa";
+ ralink,function = "pa";
+ };
+ };
};
rstctrl: rstctrl {
};
rstctrl: rstctrl {
@@
-395,17
+420,25
@@
#reset-cells = <1>;
};
#reset-cells = <1>;
};
+ clkctrl: clkctrl {
+ compatible = "ralink,rt2880-clock";
+ #clock-cells = <1>;
+ };
+
usbphy: usbphy {
usbphy: usbphy {
- compatible = "
ralink,mt7620a
-usbphy";
+ compatible = "
mediatek,mt7620
-usbphy";
#phy-cells = <1>;
resets = <&rstctrl 22 &rstctrl 25>;
reset-names = "host", "device";
#phy-cells = <1>;
resets = <&rstctrl 22 &rstctrl 25>;
reset-names = "host", "device";
+
+ clocks = <&clkctrl 22 &clkctrl 25>;
+ clock-names = "host", "device";
};
};
- ethernet@10100000 {
+ ethernet
: ethernet
@10100000 {
compatible = "mediatek,mt7620-eth";
compatible = "mediatek,mt7620-eth";
- reg = <0x10100000 10000>;
+ reg = <0x10100000
0x
10000>;
#address-cells = <1>;
#size-cells = <0>;
#address-cells = <1>;
#size-cells = <0>;
@@
-442,7
+475,7
@@
gsw: gsw@10110000 {
compatible = "mediatek,mt7620-gsw";
gsw: gsw@10110000 {
compatible = "mediatek,mt7620-gsw";
- reg = <0x10110000 8000>;
+ reg = <0x10110000
0x
8000>;
resets = <&rstctrl 23>;
reset-names = "esw";
resets = <&rstctrl 23>;
reset-names = "esw";
@@
-451,9
+484,9
@@
interrupts = <17>;
};
interrupts = <17>;
};
- sdhci@10130000 {
+ sdhci
: sdhci
@10130000 {
compatible = "ralink,mt7620-sdhci";
compatible = "ralink,mt7620-sdhci";
- reg = <0x10130000 4000>;
+ reg = <0x10130000
0x
4000>;
interrupt-parent = <&intc>;
interrupts = <14>;
interrupt-parent = <&intc>;
interrupts = <14>;
@@
-461,8
+494,8
@@
status = "disabled";
};
status = "disabled";
};
- ehci@101c0000 {
- compatible = "
ralink,rt3xxx
-ehci";
+ ehci
: ehci
@101c0000 {
+ compatible = "
generic
-ehci";
reg = <0x101c0000 0x1000>;
interrupt-parent = <&intc>;
reg = <0x101c0000 0x1000>;
interrupt-parent = <&intc>;
@@
-474,8
+507,8
@@
status = "disabled";
};
status = "disabled";
};
- ohci@101c1000 {
- compatible = "
ralink,rt3xxx
-ohci";
+ ohci
: ohci
@101c1000 {
+ compatible = "
generic
-ohci";
reg = <0x101c1000 0x1000>;
interrupt-parent = <&intc>;
reg = <0x101c1000 0x1000>;
interrupt-parent = <&intc>;
@@
-487,7
+520,7
@@
status = "disabled";
};
status = "disabled";
};
- pcie@10140000 {
+ pcie
: pcie
@10140000 {
compatible = "mediatek,mt7620-pci";
reg = <0x10140000 0x100
0x10142000 0x100>;
compatible = "mediatek,mt7620-pci";
reg = <0x10140000 0x100
0x10142000 0x100>;
@@
-498,6
+531,9
@@
resets = <&rstctrl 26>;
reset-names = "pcie0";
resets = <&rstctrl 26>;
reset-names = "pcie0";
+ clocks = <&clkctrl 26>;
+ clock-names = "pcie0";
+
interrupt-parent = <&cpuintc>;
interrupts = <4>;
interrupt-parent = <&cpuintc>;
interrupts = <4>;
@@
-524,9
+560,9
@@
};
};
};
};
- wmac@10180000 {
+ wmac
: wmac
@10180000 {
compatible = "ralink,rt7620-wmac", "ralink,rt2880-wmac";
compatible = "ralink,rt7620-wmac", "ralink,rt2880-wmac";
- reg = <0x10180000 40000>;
+ reg = <0x10180000
0x
40000>;
interrupt-parent = <&cpuintc>;
interrupts = <6>;
interrupt-parent = <&cpuintc>;
interrupts = <6>;