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ramips: add mt7620/1 sdhci pinmux
[openwrt/staging/mkresin.git]
/
target
/
linux
/
ramips
/
dts
/
mt7620a.dtsi
diff --git
a/target/linux/ramips/dts/mt7620a.dtsi
b/target/linux/ramips/dts/mt7620a.dtsi
index 3c89880746ecb1f4fb3c934e44cd8e3bc59d2d1b..a242684fd891ede36c55aef792b26a0edd52107b 100644
(file)
--- a/
target/linux/ramips/dts/mt7620a.dtsi
+++ b/
target/linux/ramips/dts/mt7620a.dtsi
@@
-1,11
+1,15
@@
/ {
#address-cells = <1>;
#size-cells = <1>;
/ {
#address-cells = <1>;
#size-cells = <1>;
- compatible = "ralink,mt
k
7620a-soc";
+ compatible = "ralink,mt7620a-soc";
cpus {
cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
cpu@0 {
compatible = "mips,mips24KEc";
cpu@0 {
compatible = "mips,mips24KEc";
+ reg = <0>;
};
};
};
};
@@
-13,7
+17,7
@@
bootargs = "console=ttyS0,57600";
};
bootargs = "console=ttyS0,57600";
};
- cpuintc: cpuintc
@0
{
+ cpuintc: cpuintc {
#address-cells = <0>;
#interrupt-cells = <1>;
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <1>;
interrupt-controller;
@@
-26,7
+30,7
@@
serial0 = &uartlite;
};
serial0 = &uartlite;
};
- palmbus@10000000 {
+ palmbus
: palmbus
@10000000 {
compatible = "palmbus";
reg = <0x10000000 0x200000>;
ranges = <0x0 0x10000000 0x1FFFFF>;
compatible = "palmbus";
reg = <0x10000000 0x200000>;
ranges = <0x0 0x10000000 0x1FFFFF>;
@@
-34,12
+38,12
@@
#address-cells = <1>;
#size-cells = <1>;
#address-cells = <1>;
#size-cells = <1>;
- sysc@0 {
- compatible = "ralink,mt7620a-sysc", "ralink,rt3050-sysc";
+ sysc
: sysc
@0 {
+ compatible = "ralink,mt7620a-sysc", "ralink,rt3050-sysc"
, "syscon"
;
reg = <0x0 0x100>;
};
reg = <0x0 0x100>;
};
- timer@100 {
+ timer
: timer
@100 {
compatible = "ralink,mt7620a-timer", "ralink,rt2880-timer";
reg = <0x100 0x20>;
compatible = "ralink,mt7620a-timer", "ralink,rt2880-timer";
reg = <0x100 0x20>;
@@
-47,7
+51,7
@@
interrupts = <1>;
};
interrupts = <1>;
};
- watchdog@120 {
+ watchdog
: watchdog
@120 {
compatible = "ralink,mt7620a-wdt", "ralink,rt2880-wdt";
reg = <0x120 0x10>;
compatible = "ralink,mt7620a-wdt", "ralink,rt2880-wdt";
reg = <0x120 0x10>;
@@
-72,7
+76,7
@@
interrupts = <2>;
};
interrupts = <2>;
};
- memc@300 {
+ memc
: memc
@300 {
compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
reg = <0x300 0x100>;
compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
reg = <0x300 0x100>;
@@
-83,7
+87,7
@@
interrupts = <3>;
};
interrupts = <3>;
};
- uart@500 {
+ uart
: uart
@500 {
compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
reg = <0x500 0x100>;
compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
reg = <0x500 0x100>;
@@
-112,7
+116,7
@@
#gpio-cells = <2>;
ralink,gpio-base = <0>;
#gpio-cells = <2>;
ralink,gpio-base = <0>;
- ralink,n
um-gpios
= <24>;
+ ralink,n
r-gpio
= <24>;
ralink,register-map = [ 00 04 08 0c
20 24 28 2c
30 34 ];
ralink,register-map = [ 00 04 08 0c
20 24 28 2c
30 34 ];
@@
-129,7
+133,7
@@
#gpio-cells = <2>;
ralink,gpio-base = <24>;
#gpio-cells = <2>;
ralink,gpio-base = <24>;
- ralink,n
um-gpios
= <16>;
+ ralink,n
r-gpio
= <16>;
ralink,register-map = [ 00 04 08 0c
10 14 18 1c
20 24 ];
ralink,register-map = [ 00 04 08 0c
10 14 18 1c
20 24 ];
@@
-148,7
+152,7
@@
#gpio-cells = <2>;
ralink,gpio-base = <40>;
#gpio-cells = <2>;
ralink,gpio-base = <40>;
- ralink,n
um-gpios
= <32>;
+ ralink,n
r-gpio
= <32>;
ralink,register-map = [ 00 04 08 0c
10 14 18 1c
20 24 ];
ralink,register-map = [ 00 04 08 0c
10 14 18 1c
20 24 ];
@@
-167,7
+171,7
@@
#gpio-cells = <2>;
ralink,gpio-base = <72>;
#gpio-cells = <2>;
ralink,gpio-base = <72>;
- ralink,n
um-gpios
= <1>;
+ ralink,n
r-gpio
= <1>;
ralink,register-map = [ 00 04 08 0c
10 14 18 1c
20 24 ];
ralink,register-map = [ 00 04 08 0c
10 14 18 1c
20 24 ];
@@
-175,8
+179,8
@@
status = "disabled";
};
status = "disabled";
};
- i2c@900 {
- compatible = "
link,mt7620a-i2c", "
ralink,rt2880-i2c";
+ i2c
: i2c
@900 {
+ compatible = "ralink,rt2880-i2c";
reg = <0x900 0x100>;
resets = <&rstctrl 16>;
reg = <0x900 0x100>;
resets = <&rstctrl 16>;
@@
-191,8
+195,8
@@
pinctrl-0 = <&i2c_pins>;
};
pinctrl-0 = <&i2c_pins>;
};
- i2s@a00 {
- compatible = "
ralink,mt7620a
-i2s";
+ i2s
: i2s
@a00 {
+ compatible = "
mediatek,mt7620
-i2s";
reg = <0xa00 0x100>;
resets = <&rstctrl 17>;
reg = <0xa00 0x100>;
resets = <&rstctrl 17>;
@@
-201,8
+205,11
@@
interrupt-parent = <&intc>;
interrupts = <10>;
interrupt-parent = <&intc>;
interrupts = <10>;
+ txdma-req = <2>;
+ rxdma-req = <3>;
+
dmas = <&gdma 4>,
dmas = <&gdma 4>,
- <&gdma
5
>;
+ <&gdma
6
>;
dma-names = "tx", "rx";
status = "disabled";
dma-names = "tx", "rx";
status = "disabled";
@@
-232,7
+239,7
@@
reset-names = "spi";
#address-cells = <1>;
reset-names = "spi";
#address-cells = <1>;
- #size-cells = <
1
>;
+ #size-cells = <
0
>;
status = "disabled";
status = "disabled";
@@
-256,7
+263,7
@@
pinctrl-0 = <&uartlite_pins>;
};
pinctrl-0 = <&uartlite_pins>;
};
- systick@d00 {
+ systick
: systick
@d00 {
compatible = "ralink,mt7620a-systick", "ralink,cevt-systick";
reg = <0xd00 0x10>;
compatible = "ralink,mt7620a-systick", "ralink,cevt-systick";
reg = <0xd00 0x10>;
@@
-267,7
+274,7
@@
interrupts = <7>;
};
interrupts = <7>;
};
- pcm@2000 {
+ pcm
: pcm
@2000 {
compatible = "ralink,mt7620a-pcm";
reg = <0x2000 0x800>;
compatible = "ralink,mt7620a-pcm";
reg = <0x2000 0x800>;
@@
-281,7
+288,7
@@
};
gdma: gdma@2800 {
};
gdma: gdma@2800 {
- compatible = "ralink,mt7620a-gdma", "ralink,rt
2880
-gdma";
+ compatible = "ralink,mt7620a-gdma", "ralink,rt
3883
-gdma";
reg = <0x2800 0x800>;
resets = <&rstctrl 14>;
reg = <0x2800 0x800>;
resets = <&rstctrl 14>;
@@
-298,7
+305,7
@@
};
};
};
};
- pinctrl {
+ pinctrl
: pinctrl
{
compatible = "ralink,rt2880-pinmux";
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
compatible = "ralink,rt2880-pinmux";
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
@@
-320,6
+327,13
@@
};
};
};
};
+ gpio_i2s_pins: gpio_i2s {
+ gpio_i2s {
+ ralink,group = "uartf";
+ ralink,function = "gpio i2s";
+ };
+ };
+
spi_pins: spi {
spi {
ralink,group = "spi";
spi_pins: spi {
spi {
ralink,group = "spi";
@@
-329,8
+343,8
@@
spi_cs1: spi1 {
spi1 {
spi_cs1: spi1 {
spi1 {
- ralink,group = "spi
_cs1
";
- ralink,function = "spi
_cs1
";
+ ralink,group = "spi
refclk
";
+ ralink,function = "spi
refclk
";
};
};
};
};
@@
-355,6
+369,13
@@
};
};
};
};
+ mdio_refclk_pins: mdio_refclk {
+ mdio_refclk {
+ ralink,group = "mdio";
+ ralink,function = "refclk";
+ };
+ };
+
ephy_pins: ephy {
ephy {
ralink,group = "ephy";
ephy_pins: ephy {
ephy {
ralink,group = "ephy";
@@
-389,6
+410,20
@@
ralink,function = "pcie rst";
};
};
ralink,function = "pcie rst";
};
};
+
+ pa_pins: pa {
+ pa {
+ ralink,group = "pa";
+ ralink,function = "pa";
+ };
+ };
+
+ sdhci_pins: sdhci {
+ sdhci {
+ ralink,group = "nd_sd";
+ ralink,function = "sd";
+ };
+ };
};
rstctrl: rstctrl {
};
rstctrl: rstctrl {
@@
-396,17
+431,26
@@
#reset-cells = <1>;
};
#reset-cells = <1>;
};
+ clkctrl: clkctrl {
+ compatible = "ralink,rt2880-clock";
+ #clock-cells = <1>;
+ };
+
usbphy: usbphy {
compatible = "mediatek,mt7620-usbphy";
usbphy: usbphy {
compatible = "mediatek,mt7620-usbphy";
- #phy-cells = <
1
>;
+ #phy-cells = <
0
>;
+ ralink,sysctl = <&sysc>;
resets = <&rstctrl 22 &rstctrl 25>;
reset-names = "host", "device";
resets = <&rstctrl 22 &rstctrl 25>;
reset-names = "host", "device";
+
+ clocks = <&clkctrl 22 &clkctrl 25>;
+ clock-names = "host", "device";
};
};
- ethernet@10100000 {
+ ethernet
: ethernet
@10100000 {
compatible = "mediatek,mt7620-eth";
compatible = "mediatek,mt7620-eth";
- reg = <0x10100000 10000>;
+ reg = <0x10100000
0x
10000>;
#address-cells = <1>;
#size-cells = <0>;
#address-cells = <1>;
#size-cells = <0>;
@@
-443,7
+487,7
@@
gsw: gsw@10110000 {
compatible = "mediatek,mt7620-gsw";
gsw: gsw@10110000 {
compatible = "mediatek,mt7620-gsw";
- reg = <0x10110000 8000>;
+ reg = <0x10110000
0x
8000>;
resets = <&rstctrl 23>;
reset-names = "esw";
resets = <&rstctrl 23>;
reset-names = "esw";
@@
-452,43
+496,46
@@
interrupts = <17>;
};
interrupts = <17>;
};
- sdhci@10130000 {
+ sdhci
: sdhci
@10130000 {
compatible = "ralink,mt7620-sdhci";
compatible = "ralink,mt7620-sdhci";
- reg = <0x10130000 4000>;
+ reg = <0x10130000
0x
4000>;
interrupt-parent = <&intc>;
interrupts = <14>;
interrupt-parent = <&intc>;
interrupts = <14>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdhci_pins>;
+
status = "disabled";
};
status = "disabled";
};
- ehci@101c0000 {
+ ehci
: ehci
@101c0000 {
compatible = "generic-ehci";
reg = <0x101c0000 0x1000>;
interrupt-parent = <&intc>;
interrupts = <18>;
compatible = "generic-ehci";
reg = <0x101c0000 0x1000>;
interrupt-parent = <&intc>;
interrupts = <18>;
- phys = <&usbphy
1
>;
+ phys = <&usbphy>;
phy-names = "usb";
status = "disabled";
};
phy-names = "usb";
status = "disabled";
};
- ohci@101c1000 {
+ ohci
: ohci
@101c1000 {
compatible = "generic-ohci";
reg = <0x101c1000 0x1000>;
interrupt-parent = <&intc>;
interrupts = <18>;
compatible = "generic-ohci";
reg = <0x101c1000 0x1000>;
interrupt-parent = <&intc>;
interrupts = <18>;
- phys = <&usbphy
1
>;
+ phys = <&usbphy>;
phy-names = "usb";
status = "disabled";
};
phy-names = "usb";
status = "disabled";
};
- pcie@10140000 {
+ pcie
: pcie
@10140000 {
compatible = "mediatek,mt7620-pci";
reg = <0x10140000 0x100
0x10142000 0x100>;
compatible = "mediatek,mt7620-pci";
reg = <0x10140000 0x100
0x10142000 0x100>;
@@
-499,6
+546,9
@@
resets = <&rstctrl 26>;
reset-names = "pcie0";
resets = <&rstctrl 26>;
reset-names = "pcie0";
+ clocks = <&clkctrl 26>;
+ clock-names = "pcie0";
+
interrupt-parent = <&cpuintc>;
interrupts = <4>;
interrupt-parent = <&cpuintc>;
interrupts = <4>;
@@
-515,19
+565,21
@@
status = "disabled";
status = "disabled";
- pcie
-bridge
{
+ pcie
0: pcie@0,0
{
reg = <0x0000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
reg = <0x0000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
+
+ ranges;
};
};
};
};
- wmac@10180000 {
+ wmac
: wmac
@10180000 {
compatible = "ralink,rt7620-wmac", "ralink,rt2880-wmac";
compatible = "ralink,rt7620-wmac", "ralink,rt2880-wmac";
- reg = <0x10180000 40000>;
+ reg = <0x10180000
0x
40000>;
interrupt-parent = <&cpuintc>;
interrupts = <6>;
interrupt-parent = <&cpuintc>;
interrupts = <6>;