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ramips: convert MT7628 EEPROM to NVMEM format
[openwrt/openwrt.git]
/
target
/
linux
/
ramips
/
dts
/
mt7620a_lava_lr-25g001.dts
diff --git
a/target/linux/ramips/dts/mt7620a_lava_lr-25g001.dts
b/target/linux/ramips/dts/mt7620a_lava_lr-25g001.dts
index e400ebcff07f2e35028cddc0978a1bc95bc83550..07355a05a5ad3f7acd472f2ad1676bee9eecd65c 100644
(file)
--- a/
target/linux/ramips/dts/mt7620a_lava_lr-25g001.dts
+++ b/
target/linux/ramips/dts/mt7620a_lava_lr-25g001.dts
@@
-1,9
+1,8
@@
-/dts-v1/;
-
#include "mt7620a.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "mt7620a.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
+#include <dt-bindings/mtd/partitions/uimage.h>
/ {
compatible = "lava,lr-25g001", "ralink,mt7620a-soc";
/ {
compatible = "lava,lr-25g001", "ralink,mt7620a-soc";
@@
-36,18
+35,20
@@
compatible = "gpio-leds";
led_status: status {
compatible = "gpio-leds";
led_status: status {
- label = "
lr-25g001:
green:status";
+ label = "green:status";
gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
};
wifi2g {
gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
};
wifi2g {
- label = "
lr-25g001:
green:wifi2g";
+ label = "green:wifi2g";
gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "phy1tpt";
};
wifi5g {
};
wifi5g {
- label = "
lr-25g001:
green:wifi5g";
+ label = "green:wifi5g";
gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "phy0tpt";
};
};
};
};
@@
-63,10
+64,6
@@
};
};
};
};
-&gpio0 {
- status = "okay";
-};
-
&spi0 {
status = "okay";
&spi0 {
status = "okay";
@@
-87,7
+84,9
@@
};
partition@10000 {
};
partition@10000 {
- compatible = "amit,jimage";
+ compatible = "openwrt,uimage", "denx,uimage";
+ openwrt,ih-magic = <IH_MAGIC_OKLI>;
+ openwrt,offset = <0x10000>;
label = "firmware";
reg = <0x10000 0xfe0000>;
};
label = "firmware";
reg = <0x10000 0xfe0000>;
};
@@
-110,7
+109,6
@@
};
ðernet {
};
ðernet {
- status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
pinctrl-names = "default";
pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
@@
-122,41
+120,29
@@
mdio-bus {
status = "okay";
mdio-bus {
status = "okay";
- mediatek,mdio-mode = <1>;
-
phy0:
ethernet-phy@0 {
+ ethernet-phy@0 {
reg = <0>;
phy-mode = "rgmii";
qca,ar8327-initvals = <
0x04 0x87300000 /* PORT0 PAD MODE CTRL */
0x0c 0x00000000 /* PORT6 PAD MODE CTRL */
0x7c 0x0000007e /* PORT0_STATUS */
reg = <0>;
phy-mode = "rgmii";
qca,ar8327-initvals = <
0x04 0x87300000 /* PORT0 PAD MODE CTRL */
0x0c 0x00000000 /* PORT6 PAD MODE CTRL */
0x7c 0x0000007e /* PORT0_STATUS */
+ 0x80 0x00001200 /* PORT1_STATUS */
+ 0x84 0x00001200 /* PORT2_STATUS */
+ 0x88 0x00001200 /* PORT3_STATUS */
+ 0x8c 0x00001200 /* PORT4_STATUS */
+ 0x90 0x00001200 /* PORT5_STATUS */
0x94 0x00000000 /* PORT6_STATUS */
>;
};
0x94 0x00000000 /* PORT6_STATUS */
>;
};
-
- phy1: ethernet-phy@1 {
- reg = <1>;
- phy-mode = "rgmii";
- };
-
- phy2: ethernet-phy@2 {
- reg = <2>;
- phy-mode = "rgmii";
- };
-
- phy3: ethernet-phy@3 {
- reg = <3>;
- phy-mode = "rgmii";
- };
-
- phy4: ethernet-phy@4 {
- reg = <4>;
- phy-mode = "rgmii";
- };
};
};
};
};
+&gsw {
+ mediatek,ephy-base = /bits/ 8 <8>;
+};
+
&pcie {
status = "okay";
};
&pcie {
status = "okay";
};
@@
-164,15
+150,26
@@
&pcie0 {
mt76x0e@0,0 {
reg = <0x0000 0 0 0 0>;
&pcie0 {
mt76x0e@0,0 {
reg = <0x0000 0 0 0 0>;
- mtd-mac-address = <&config 0xe07e>;
- mtd-mac-address-increment = <(2)>;
+ nvmem-cells = <&macaddr_config_e07e>;
+ nvmem-cell-names = "mac-address";
+ mac-address-increment = <(2)>;
mediatek,mtd-eeprom = <&config 0xe08a>;
};
};
&state_default {
gpio {
mediatek,mtd-eeprom = <&config 0xe08a>;
};
};
&state_default {
gpio {
- ralink,group = "uartf", "i2c";
- ralink,function = "gpio";
+ groups = "uartf", "i2c";
+ function = "gpio";
+ };
+};
+
+&config {
+ compatible = "nvmem-cells";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ macaddr_config_e07e: macaddr@e07e {
+ reg = <0xe07e 0x6>;
};
};
};
};