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uboot-mediatek: add support for GD5F1GQ5UE
[openwrt/openwrt.git] / package / boot / uboot-mediatek / patches / 100-02-drivers-mtd-add-support-for-MediaTek-SPI-NAND-flash-.patch
diff --git a/package/boot/uboot-mediatek/patches/100-02-drivers-mtd-add-support-for-MediaTek-SPI-NAND-flash-.patch b/package/boot/uboot-mediatek/patches/100-02-drivers-mtd-add-support-for-MediaTek-SPI-NAND-flash-.patch
index 89cc0aa71ebd6cc4bba553bec02184bdce64d80f..e75251d172197da0aafccc3f961e9d1749b16662 100644 (file)
--- a/package/boot/uboot-mediatek/patches/100-02-drivers-mtd-add-support-for-MediaTek-SPI-NAND-flash-.patch
+++ b/package/boot/uboot-mediatek/patches/100-02-drivers-mtd-add-support-for-MediaTek-SPI-NAND-flash-.patch
@@ -17,14 +17,14 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  drivers/mtd/mtk-snand/Kconfig         |   21 +
  drivers/mtd/mtk-snand/Makefile        |   11 +
  drivers/mtd/mtk-snand/mtk-snand-def.h |  271 ++++
- drivers/mtd/mtk-snand/mtk-snand-ecc.c |  395 +++++
- drivers/mtd/mtk-snand/mtk-snand-ids.c |  511 +++++++
+ drivers/mtd/mtk-snand/mtk-snand-ecc.c |  411 ++++++
+ drivers/mtd/mtk-snand/mtk-snand-ids.c |  515 +++++++
  drivers/mtd/mtk-snand/mtk-snand-mtd.c |  535 +++++++
  drivers/mtd/mtk-snand/mtk-snand-os.c  |   39 +
  drivers/mtd/mtk-snand/mtk-snand-os.h  |  120 ++
  drivers/mtd/mtk-snand/mtk-snand.c     | 1933 +++++++++++++++++++++++++
  drivers/mtd/mtk-snand/mtk-snand.h     |   77 +
- 12 files changed, 3917 insertions(+)
+ 12 files changed, 3937 insertions(+)
  create mode 100644 drivers/mtd/mtk-snand/Kconfig
  create mode 100644 drivers/mtd/mtk-snand/Makefile
  create mode 100644 drivers/mtd/mtk-snand/mtk-snand-def.h
@@ -38,7 +38,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
 
 --- a/drivers/mtd/Kconfig
 +++ b/drivers/mtd/Kconfig
-@@ -210,6 +210,8 @@ config SYS_MAX_FLASH_BANKS_DETECT
+@@ -238,6 +238,8 @@ config SYS_MAX_FLASH_BANKS_DETECT
         to reduce the effective number of flash bank, between 0 and
         CONFIG_SYS_MAX_FLASH_BANKS
  
@@ -46,10 +46,10 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
 +
  source "drivers/mtd/nand/Kconfig"
  
- config SYS_NAND_MAX_CHIPS
+ config SYS_NAND_MAX_OOBFREE
 --- a/drivers/mtd/Makefile
 +++ b/drivers/mtd/Makefile
-@@ -38,3 +38,5 @@ obj-$(CONFIG_$(SPL_TPL_)SPI_FLASH_SUPPOR
+@@ -39,3 +39,5 @@ obj-$(CONFIG_$(SPL_TPL_)SPI_FLASH_SUPPOR
  obj-$(CONFIG_SPL_UBI) += ubispl/
  
  endif
@@ -369,7 +369,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
 +#endif /* _MTK_SNAND_DEF_H_ */
 --- /dev/null
 +++ b/drivers/mtd/mtk-snand/mtk-snand-ecc.c
-@@ -0,0 +1,395 @@
+@@ -0,0 +1,411 @@
 +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
 +/*
 + * Copyright (C) 2020 MediaTek Inc. All Rights Reserved.
@@ -418,6 +418,10 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
 +
 +static const uint8_t mt7622_ecc_caps[] = { 4, 6, 8, 10, 12 };
 +
++static const uint8_t mt7981_ecc_caps[] = {
++      4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24
++};
++
 +static const uint8_t mt7986_ecc_caps[] = {
 +      4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24
 +};
@@ -426,6 +430,10 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
 +      [ECC_DECDONE] = 0x11c,
 +};
 +
++static const uint32_t mt7981_ecc_regs[] = {
++      [ECC_DECDONE] = 0x124,
++};
++
 +static const uint32_t mt7986_ecc_regs[] = {
 +      [ECC_DECDONE] = 0x124,
 +};
@@ -447,6 +455,14 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
 +              .errnum_bits = 5,
 +              .errnum_shift = 5,
 +      },
++      [SNAND_SOC_MT7981] = {
++              .ecc_caps = mt7981_ecc_caps,
++              .num_ecc_cap = ARRAY_SIZE(mt7981_ecc_caps),
++              .regs = mt7981_ecc_regs,
++              .mode_shift = 5,
++              .errnum_bits = 5,
++              .errnum_shift = 8,
++      },
 +      [SNAND_SOC_MT7986] = {
 +              .ecc_caps = mt7986_ecc_caps,
 +              .num_ecc_cap = ARRAY_SIZE(mt7986_ecc_caps),
@@ -767,7 +783,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
 +}
 --- /dev/null
 +++ b/drivers/mtd/mtk-snand/mtk-snand-ids.c
-@@ -0,0 +1,511 @@
+@@ -0,0 +1,519 @@
 +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
 +/*
 + * Copyright (C) 2020 MediaTek Inc. All Rights Reserved.
@@ -860,6 +876,10 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
 +                 &snand_cap_read_from_cache_quad,
 +                 &snand_cap_program_load_x4,
 +                 mtk_snand_winbond_select_die),
++      SNAND_INFO("W25N01KV", SNAND_ID(SNAND_ID_DYMMY, 0xef, 0xae, 0x21),
++                 SNAND_MEMORG_1G_2K_64,
++                 &snand_cap_read_from_cache_quad,
++                 &snand_cap_program_load_x4),
 +      SNAND_INFO("W25N02KV", SNAND_ID(SNAND_ID_DYMMY, 0xef, 0xaa, 0x22),
 +                 SNAND_MEMORG_2G_2K_128,
 +                 &snand_cap_read_from_cache_quad,
@@ -881,6 +901,10 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
 +                 SNAND_MEMORG_1G_2K_64,
 +                 &snand_cap_read_from_cache_quad_q2d,
 +                 &snand_cap_program_load_x4),
++      SNAND_INFO("GD5F1GQ5UExxG", SNAND_ID(SNAND_ID_ADDR, 0xc8, 0x51),
++                 SNAND_MEMORG_1G_2K_128,
++                 &snand_cap_read_from_cache_quad,
++                 &snand_cap_program_load_x4),
 +      SNAND_INFO("GD5F2GQ4UExIG", SNAND_ID(SNAND_ID_ADDR, 0xc8, 0xd2),
 +                 SNAND_MEMORG_2G_2K_128,
 +                 &snand_cap_read_from_cache_quad_q2d,
@@ -903,7 +927,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
 +                 &snand_cap_program_load_x4),
 +      SNAND_INFO("GD5F2GQ5UExxG", SNAND_ID(SNAND_ID_DYMMY, 0xc8, 0x52),
 +                 SNAND_MEMORG_2G_2K_128,
-+                 &snand_cap_read_from_cache_quad_q2d,
++                 &snand_cap_read_from_cache_quad_a8d,
 +                 &snand_cap_program_load_x4),
 +      SNAND_INFO("GD5F4GQ4UCxIG", SNAND_ID(SNAND_ID_DYMMY, 0xc8, 0xb4),
 +                 SNAND_MEMORG_4G_4K_256,
@@ -1337,7 +1361,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
 +      instr->state = MTD_ERASING;
 +
 +      while (start_addr < end_addr) {
-+              WATCHDOG_RESET();
++              schedule();
 +
 +              if (mtk_snand_block_isbad(msm->snf, start_addr)) {
 +                      if (!instr->scrub) {
@@ -1390,7 +1414,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
 +      ops->retlen = 0;
 +
 +      while (len || ooblen) {
-+              WATCHDOG_RESET();
++              schedule();
 +
 +              if (ops->mode == MTD_OPS_AUTO_OOB)
 +                      ret = mtk_snand_read_page_auto_oob(msm->snf, addr,
@@ -1518,7 +1542,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
 +      ops->retlen = 0;
 +
 +      while (len || ooblen) {
-+              WATCHDOG_RESET();
++              schedule();
 +
 +              if (len) {
 +                      /* Move data */
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